R
Ricardo Reis
Researcher at Universidade Federal do Rio Grande do Sul
Publications - 455
Citations - 4143
Ricardo Reis is an academic researcher from Universidade Federal do Rio Grande do Sul. The author has contributed to research in topics: Soft error & Logic gate. The author has an hindex of 26, co-authored 445 publications receiving 3713 citations. Previous affiliations of Ricardo Reis include University of Rio Grande & Pontifícia Universidade Católica do Rio Grande do Sul.
Papers
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Proceedings ArticleDOI
Physical design methodologies for performance predictability and manufacturability
TL;DR: This paper presents some techniques to improve reliability and manufacturability by the use of some layout strategies and discusses the effects of layout strategies in the design of reconfigurable systems.
Proceedings ArticleDOI
Designing fault tolerant systems into SRAM-based FPGAs
TL;DR: This paper discusses high level techniques for designing fault tolerant systems in SRAM-based FPGAs, without modification in the FPGA architecture, and presents some fault coverage results and a comparison with the TMR approach.
Journal ArticleDOI
Designing fault-tolerant techniques for SRAM-based FPGAs
F.G. de Lima Kastensmidt,Gustavo Neuberger,Renato Fernandes Hentschke,Luigi Carro,Ricardo Reis +4 more
TL;DR: A fault tolerance technique for transient and permanent faults in SRAM-based FPGAs is presented that combines duplication with comparison and concurrent error detection to provide a highly reliable circuit while maintaining hardware, pin, and power overheads far lower than with classic triple-modular-redundancy techniques.
Proceedings ArticleDOI
A fault injection analysis of Virtex FPGA TMR design methodology
TL;DR: In this paper, the authors present the meaningful results of a single bit upset fault injection analysis performed in Virtex FPGA triple modular redundancy (TMR) design, each programmable bit upset able to cause an error in the TMR design has been investigated.
BookDOI
Radiation Effects on Embedded Systems
TL;DR: In this article, the authors provide an extensive overview of radiation effects on integrated circuits, offering major guidelines for coping with radiation effect on components, based on the tutorials presented at the International School on Effects of Radiation on Embedded Systems for Space Applications (SERESSA).