Surface potential of symmetric double gate MOSFET is analytically investigated by solving Poisson's equation subject to appropriate boundary conditions considering the presence of both free and doped carriers. Different semiconductors are considered for simulation purpose to find the change in potential w.r.t to the already existing results for Si, and carrier concentrations are modified within feasible limit to observe the variation. Simulations are also carried out at different temperatures in order to account the Joule heat effect at on-chip, and significant variations are observed. Result will play key role in determining drain current through DG MOSFET which satisfies Ortiz-Conde model.

Computing Surface Potential of Double Gate MOSFET for both Free and Doped Carrier Concentrations

A new analytical drain current model is proposed for symmetrical undoped double gate MOS transistors. It contains no fitting parameters and is physically-based.

https://ieeexplore.ieee.org/iel5/6218252/6225738/06226274.pdf

Analytical drain current core model for undoped double gate MOS transistor

Recently, the industry has focused a great deal on the use of non-planar multi-gate device structures. Many drain current models are available for undoped thin silicon channel double-gate (DG) silicon-on-insulator (SOI) MOSFET, but these models do not take charge coupling effect into account leading to an error of more than 20 percent for silicon channel thicknesses below 30nm. Hence, we present here a modified drain current model based on the widely accepted and studied Ortiz-Conde suface potential model. The proposed model incorporates charge-coupling effect which comes into play in thin silicon channel multi-gate devices due to interaction of the multiple gates. The results of both the Ortiz-Conde's surface potential based model and the modified current model have been compared with simulated results obtained from Taurus-Davinci simulator. The modified model has an error percentage less than 4% even for channel widths as low as 5nm. Results are not compared below 5nm as Quantum effects are observed for channel thicknesses less than 5nm.

Rohit Yadav

Papers

Modified surface potential based current modeling of thin silicon channel double gate SOI FinFETs

Surface potential based current modeling of thin silicon channel double and tri-gate soi finfets