Ryuji Ohba

Bio: Ryuji Ohba is an academic researcher from Toshiba. The author has contributed to research in topics: MOSFET & Random number generation. The author has an hindex of 15, co-authored 48 publications receiving 999 citations. Previous affiliations of Ryuji Ohba include University of Tokyo.

Non-volatile Si quantum memory with self-aligned doubly-stacked dots

Abstract: We propose a novel Si dot memory whose floating gate consists of self-aligned doubly stacked Si dots. A lower Si dot exists immediately below an upper dot and lies between thin tunnel oxides. It is experimentally shown that charge retention is improved compared to the usual single-layer Si dot memory. A theoretical model considering quantum confinement and Coulomb blockade in the lower Si dot explains the experimental results consistently, and shows that charge retention is improved exponentially by lower dot size scaling. It is shown that the retention improvement by lower dot scaling is possible, keeping the same write/erase speed as single dot memory, when the tunnel oxide thickness is adjusted simultaneously.

Programmable single-electron transistor logic for future low-power intelligent LSI: proposal and room-temperature operation

Abstract: This paper proposes, for the first time, the concept of programmable logic circuit realized with single-electron transistors (SETs). An SET having nonvolatile memory function is a key element for the programmable SET logic. The writing and erasing operations of the nonvolatile memory function make it possible to tune the phase of Coulomb oscillations. The half-period phase shift induced by the memory function makes the function of SETs complementary to that of the conventional SETs. As a result, SETs having nonvolatile memory function have the functionality of both the conventional (nMOS-like) SETs and the complementary (pMOS-like) SETs. By utilizing this fact, the function of SET circuits can be programmed with great flexibility, on the basis of the information stored by the memory functions. We have successfully fabricated SETs that operate at room temperature and observed the highest room-temperature peak-to-valley current ratio of Coulomb oscillations. The operation of the programmable SET logic is demonstrated using the room-temperature operating SETs. This is the first demonstration of room-temperature SET logic operation. The proposed programmable SET logic provides the potential for low-power, intelligent LSI chips suitable for mobile applications.

Analytical Single-Electron Transistor(SET)Model for Design and Analysis of Realistic SET Circuits

Abstract: In this work, we propose a compact, physically based, analytical single-electron transistor (SET) model suitable for the design and analysis of realistic SET circuits. The model is derived on the basis of the "orthodox" theory of correlated single-electron tunneling and the steady-state master equation method. The SET inverter characteristics are successfully calculated using the model implemented in the simulation program with integrated circuit emphasis (SPICE). The hybrid circuit of SETs with metal-oxide-semiconductor field-effect transistors (MOSFETs) is also successfully simulated. By utilizing the model, it is clarified that the drain-voltage-induced shift of the gate voltage dependence of SET current reaches one-half of the drain voltage in the case of a completely symmetric SET.

Experimental evidences of quantum-mechanical effects on low-field mobility, gate-channel capacitance, and threshold voltage of ultrathin body SOI MOSFETs

Abstract: The characteristics of ultrathin-body (UTB) SOI MOSFETs, whose SOI-channel thickness T/sub SOI/ is thinner than the inversion-layer thickness of bulk MOSFETs, are investigated It is found for the first time that at low temperatures (<50 K) the mobility of the UTB MOSFETs coincides with that of thicker body SOI MOSFETs in spite of the fact that at room temperature the mobility of UTB MOSFETs decreases as T/sub SOI/ decreases It is experimentally demonstrated for the first time that the gate-channel capacitance of the UTB MOSFETs increases as T/sub SOI/ decreases In addition, it is demonstrated that the physical origins of the threshold voltage increase in UTB MOSFETs can be categorized as mobility degradation and a subband energy level increase All these results are consistently explained in terms of quanturn-mechanical effects

Programmable single-electron transistor logic for low-power intelligent Si LSI

Abstract: Room-temperature-operating single-electron devices work not only as single-electron transistors (SETs) but also as nonvolatile single-electron memories. It is demonstrated that the combination of Coulomb oscillations with the nonvolatile memory functions offers high programmability for LSIs. The power and delay of a programmable SET logic are estimated.

Prospects of Colloidal Nanocrystals for Electronic and Optoelectronic Applications

Abstract: Nanocrystals (NCs) discussed in this Review are tiny crystals of metals, semiconductors, and magnetic material consisting of hundreds to a few thousand atoms each. Their size ranges from 2-3 to about 20 nm. What is special about this size regime that placed NCs among the hottest research topics of the last decades? The quantum mechanical coupling * To whom correspondence should be addressed. E-mail: dvtalapin@uchicago.edu. † The University of Chicago. ‡ Argonne National Lab. Chem. Rev. 2010, 110, 389–458 389

Semiconductor device, and manufacturing method thereof

Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Strained Si, SiGe, and Ge channels for high-mobility metal-oxide-semiconductor field-effect transistors

Abstract: This article reviews the history and current progress in high-mobility strained Si, SiGe, and Ge channel metal-oxide-semiconductor field-effect transistors (MOSFETs). We start by providing a chronological overview of important milestones and discoveries that have allowed heterostructures grown on Si substrates to transition from purely academic research in the 1980’s and 1990’s to the commercial development that is taking place today. We next provide a topical review of the various types of strain-engineered MOSFETs that can be integrated onto relaxed Si1−xGex, including surface-channel strained Si n- and p-MOSFETs, as well as double-heterostructure MOSFETs which combine a strained Si surface channel with a Ge-rich buried channel. In all cases, we will focus on the connections between layer structure, band structure, and MOS mobility characteristics. Although the surface and starting substrate are composed of pure Si, the use of strained Si still creates new challenges, and we shall also review the litera...

Electrical Switching and Bistability in Organic/Polymeric Thin Films and Memory Devices

Abstract: Recently, films created by incorporating metallic nanoparticles into organic or polymeric materials have demonstrated electrical bistability, as well as the memory effect, when subjected to an electrical bias. Organic and polymeric digital memory devices based on this bistable electronic behavior have emerged as a viable technology in the field of organic electronics. These devices exhibit fast response speeds and can form multiple-layer stacking structures, demonstrating that organic memory devices possess a high potential to become flexible, ultrafast, and ultrahigh-density memory devices. This behavior is believed to be related to charge storage in the organic or polymer film, where devices are able to exhibit two different states of conductivity often separated by several orders of magnitude. By defining the two states as “1” and “0”, it is now possible to create digital memory devices with this technology. This article reviews electrically bistable devices developed in our laboratory. Our research has stimulated strong interest in this area worldwide. The research by other laboratories is reviewed as well.

Metal nanocrystal memories. I. Device design and fabrication

Abstract: This paper describes the design principles and fabrication process of metal nanocrystal memories. The advantages of metal nanocrystals over their semiconductor counterparts include higher density of states, stronger coupling with the channel, better size scalability, and the design freedom of engineering the work functions to optimize device characteristics. One-dimensional (1-D) analyses are provided to illustrate the concept of work function engineering, both in direct-tunneling and F-N-tunneling regimes. A self-assembled nanocrystal formation process by rapid thermal annealing of ultrathin metal film deposited on top of gate oxide is developed and integrated with NMOSFET to fabricate such devices.