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Author

S.K. Pillai

Bio: S.K. Pillai is an academic researcher from Indian Institute of Technology Bombay. The author has contributed to research in topics: Electronic circuit & Voltage. The author has an hindex of 3, co-authored 7 publications receiving 25 citations.

Papers
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Proceedings ArticleDOI
08 Jan 1996
TL;DR: A novel synchronous DC link voltage notching circuit topology for zero voltage switching (ZVS) of PWM inverters is presented and the synchronous operation of the link voltage with any PWM pattern is facilitated.
Abstract: This paper presents a novel synchronous DC link voltage notching circuit topology for zero voltage switching (ZVS) of PWM inverters. The link voltage will fall to zero almost immediately after the controlled switch is turned on. Thus, the synchronous operation of the link voltage with any PWM pattern is facilitated. Analysis and simulation have demonstrated the successful operation of the new topology. The feasibility of the proposed scheme is experimentally verified on a laboratory prototype.

8 citations

Proceedings ArticleDOI
17 May 1998
TL;DR: A new quasi-resonant DC-link (QRDCL) PWM inverter with zero voltage switching (ZVS) capability and the circuit doesn't require any current sensing device, thereby, making the control circuit simple and cheap.
Abstract: This paper presents a new quasi-resonant DC-link (QRDCL) PWM inverter with zero voltage switching (ZVS) capability. The proposed quasi-resonant circuit creates zero voltage intervals in the DC-link to facilitate ZVS of the inverter switches under all operating conditions. This is achieved with the DC-link voltage being clamped at the source voltage V, using minimum additional components. It requires only two additional switches compared to the conventional PWM converter. Moreover, the control circuit is not called upon to control the inductor current, as it is the case with other circuits of the same family. Hence, it doesn't require any current sensing device, thereby, making the control circuit simple and cheap. The operating principle of the circuit is explained and detailed analysis of each operating mode is given. A design criterion for achieving ZVS is obtained from the mathematical analysis. The feasibility of the proposed circuit operation has been verified by PSPICE simulation. The simulation results show full ZVS for both the proposed circuit and the PWM inverter.

7 citations

Proceedings ArticleDOI
31 Aug 1998
TL;DR: This paper presents some novel circuits of soft-switched quasi-resonant DC/DC boost and flyback converters that use coupled inductors with capacitors for the resonating circuit to achieve zero voltage switching of the converters.
Abstract: This paper presents some novel circuits of soft-switched quasi-resonant DC/DC boost and flyback converters These topologies use coupled inductors with capacitors for the resonating circuit to achieve zero voltage switching of the converters The circuits have minimum voltage stress across the switches Moreover, they have reduced commutation losses and increased switching frequency The paper explains the principle of operation and describes the analysis of both boost as well as flyback converters It also gives design criteria, derived from the mathematical analysis carried out, for achieving zero voltage switching under all loading conditions from no load to full load The feasibility of the proposed circuits has been verified by PSPICE simulation

5 citations

Proceedings ArticleDOI
17 May 1998
TL;DR: The paper explains the principle of operation of the circuit and describes the analysis of each mode of operation for both boost as well as flyback power converters, and gives design criteria for achieving zero voltage switching under all loading conditions from no load to full load.
Abstract: This paper presents some novel synchronized quasi-resonant circuits for achieving soft-switching DC/DC boost and flyback power converters. These topologies use coupled inductors with capacitor for resonating the circuit to achieve zero voltage switching of the power converters. The circuits have minimum voltage stress across the switches. Moreover, they have reduced commutation losses and increased switching frequency. The paper explains the principle of operation of the circuit and describes the analysis of each mode of operation for both boost as well as flyback power converters. It also gives design criteria, derived from the mathematical analysis carried out, for achieving zero voltage switching under all loading conditions from no load to full load. The feasibility of the proposed circuits has been verified by PSPICE simulation.

3 citations

Proceedings ArticleDOI
31 Aug 1998
TL;DR: In this article, the authors present a family of circuits for single-phase diode rectifiers capable of drawing approximately sinusoidal current waveforms at unity power factor with high efficiency and minimum voltage stress across the switches.
Abstract: This paper presents a family of circuits for single-phase diode rectifiers capable of drawing approximately sinusoidal current waveforms at unity power factor with high efficiency and minimum voltage stress across the switches. Moreover, they are suitable to work as boost and flyback power converters. These topologies use coupled inductors with capacitors for resonance to achieve zero voltage switching (ZVS) of the converters. The circuits consist of a single-phase diode bridge rectifier, followed by a boost stage containing two switches-the main switch for controlling the output DC voltage and the auxiliary switch for achieving ZVS. The output voltage is regulated by employing fixed frequency control. The paper explains the principle of operation and describes the analysis of each mode of operation for both boost and flyback converters. It also gives design criteria, derived from the mathematical analysis carried out, for achieving ZVS under all loading conditions from no load to full load. The simulation results obtained using PSPICE demonstrate the validity of the proposed power converters.

2 citations


Cited by
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Journal ArticleDOI
04 Mar 2005
TL;DR: In this article, a classification methodology of the ZVT soft-transition technique, based on different ways of implementing the auxiliary circuit voltage source, is presented and their key features and characteristics are discussed and analyzed experimentally on 1 kW/100 kHz laboratory prototypes.
Abstract: The paper presents a classification methodology of the ZVT soft-transition technique, based on different ways of implementing the auxiliary circuit voltage source. The merits and limitations of each class are presented and their key features and characteristics are discussed and analysed experimentally on 1 kW/100 kHz laboratory prototypes. Using the proposed classification criteria, any ZVT topology can be classified, whether or not they have appeared in publication. Additionally, an overview of the main ZVT PWM converters proposed in recent decades is also presented.

42 citations

Journal ArticleDOI
TL;DR: In this article, the authors classified the pulse pulsed dc-link voltage (PDCLV) topologies in six types, depending on both the shape of the pulsed DClink voltage waveform and the circuit ability to synchronize, or not, with external pulse width modulation (PWM) signals.
Abstract: This paper classifies the pulse pulsed dc-link voltage (PDCLV) topologies in six types, depending on both the shape of the pulsed DC-link voltage waveform and the circuit ability to synchronize, or not, with external pulse width modulation (PWM) signals. Main features are compared for a large number of topologies in which the bridge devices commutate under zero-voltage-switching (ZVS) technique. The paper also presents a comparative study of the losses produced by these converters and discusses the principles they employ causing generation such losses. An overview of the control and PWM possibilities for these converters is given and an extensive bibliography is included.

21 citations

Proceedings ArticleDOI
23 Jun 2000
TL;DR: In this article, the authors present and classify the pulse pulsed DC-link voltage (PDCLV) topologies in six types, depending on their ability to synchronize, or not, with external pulse width modulation (PWM) signals and on the shape of the pulsed DCLV waveform.
Abstract: This digest presents and classifies the pulse pulsed DC-link voltage (PDCLV) topologies in six types, depending on their ability to synchronize, or not, with external pulse width modulation (PWM) signals and on the shape of the pulsed DC-link voltage waveform. An overview on the control and PWM possibilities for these converters is given and an extensive bibliography is included. Main features are compared for topologies in which the bridge devices commutate under zero-voltage-switching (ZVS) technique. A comprehensive study of principles employed and their importance on generating losses is presented. Although this study focuses mainly on inverters most of these can be easily adapted to be used with AC-to-DC and AC-to-AC converters.

17 citations

Proceedings ArticleDOI
15 Aug 2000
TL;DR: Modewise analysis of the circuit and extensive simulation in PSPICE under a wide range of loading conditions have been carried out and the simulation results are found to be in agreement with the analytical expressions.
Abstract: This paper proposes an alternate soft switching scheme for conventional boost converters using lower source voltages. The proposed circuit is simple, uses a single switch and minimum components, and offers load independent operation. The only switch used in the converter is turned on with zero current and turned off at zero voltage. Modewise analysis of the circuit and extensive simulation in PSPICE under a wide range of loading conditions have been carried out. The simulation results are found to be in agreement with the analytical expressions.

13 citations

Journal ArticleDOI
TL;DR: In this article, the performance of the passive soft-switching snubber inverter (PSSSI) was investigated and the efficiency of the power cable and electric motor used in industrial electric drive applications was also taken into consideration.
Abstract: This article is an investigation on the analysis and performance of the passive soft-switching snubber inverter (PSSSI). The efficiency of the power cable and electric motor used in industrial electric drive applications is also taken into consideration. As reported in the literature, the PSSSI is used to reduce the overvoltage on the motor side when both voltage source inverters are equipped with high-speed semiconductor devices and a long power cable is used. The PSSSI configuration derives from the conventional two-level inverter by adding a diode–capacitor snubber for each switching power device. Furthermore, an additional circuit is used to recover energy from the snubber capacitors. The three-phase PSSSI is carefully designed taking into account several system parameters, such as the dV/dt , the length of the power cable between the motor and the inverter, the gate resistance of the switches, the dead-time, the snubber capacitors’ value, and the switching frequency. Experimental results show a good efficiency performance of the entire electric drive as well as a reduced dV/dt at the electric motor terminals when the PSSSI is used compared to when the two-level three-phase inverter is adopted.

13 citations