S.L. Badnikar

Bio: S.L. Badnikar is an academic researcher from Solid State Physics Laboratory. The author has contributed to research in topics: Monolithic microwave integrated circuit & MESFET. The author has an hindex of 2, co-authored 5 publications receiving 8 citations.

A very wideband FET resistive MMIC double balanced mixer based on empirical non-linear cold FET model

Abstract: A broadband FET resistive mixer MMIC on GaAs substrate is described in this paper. A non-linear model of MESFET operating in passive mode (Vds=0V) developed for design and simulation of mixer has also been analyzed. Measured mixer results match closely with the simulations based on the developed model. The on-chip broadband spiral baluns delivered wide frequency range from 230 MHz to 1.8 GHz while the LO/RF frequency coverage was from 2–8 GHz. 10 dB conversion loss was achieved for 500 MHz IF at 5 GHz RF frequency, and 10 dBm LO power. The mixer exhibited >10 dBm input 1dB compression point, 18 dBm input 3rd order intercept point and >30 dB LO-IF and RF-IF isolation. The mixer was realized in compact chip area of 2.8 × 2.6 mm2 through intensive EM simulations using ADS momentum EM simulator and was fabricated using the standard G7A MESFET process at GAETEC.

Design and Electrical Characterization of Wafer-level Micro-package for GaAs-based RFMEMS Switches

Abstract: Packaging of Micro-Electro-Mechanical system (MEMS) at wafer-level is one of the critical areas for its application, as the MEMS elements are delicate and can easily get damaged during wafer scribing or packaging process. We describe here a novel approach for wafer-level encapsulation of GaAs-based RFMEMS switches. EM simulation of the proposed microcaps has been carried out to study the effect of encapsulation on the switch performance. Both GaAs and Pyrex glass-based caps have been fabricated and the switches were encapsulated. The performance of the packaged switches has been characterized and the measured results show a close agreement with EM simulation.

Ultra Wideband Receiver Protection Limiter Using 0.13m pHEMT Technology

Abstract: This paper describes design and development of an ultra-wideband receiver protection limiter realized using 0.13um pHEMT technology. The limiter achieves very low insertion loss of > 1dB, wide band match S11/S22 > 10dB) and high power handling of 33dBm (2W) over a very high bandwidth of 0.5 to 18GHz. The flat leakage power of the designed limiter is 20dBm. The chip is realized in a very compact size of 1.6×0.71mm.

A compact C-band down converter SiP with integrated LO in a metal ceramic package

Abstract: This paper presents the design and development of a compact C-band down converter realized in a 12mm×12mm surface mount metal ceramic package. The size reduction has been achieved by development of compact sized MMIC components required for the receiver, viz., a double balanced mixer, a voltage controlled oscillator with on-chip varactor and RF and IF amplifiers. All the MMICs have been designed and fabricated using indigenously developed 0.7μm GaAs MESFET (G7A) technology at GAETEC. The receiver works in a frequency range of 5.0–6.0 GHz and produces down converted signal in 500–1500 MHz band when beaten with internal LO of the receiver, operated at 4.5 GHz. The conversion gain of the receiver is 27dB with a noise figure of 5dB. The RF-IF and LO-IF isolation of better than 25dB is achieved though EM optimized placement of MMICs and isolation barriers inside the package.

Design and characterization of a tunable patch antenna loaded with capacitive MEMS switch using CSRRs structure on the patch

Abstract: In this paper, the design and characterization of a tunable patch antenna loaded with complementary split ring resonators (CSRRs) on the patch have been realized. To achieve tunable resonant frequency, bandwidth and radiation pattern, the antenna is further loaded with coplanar waveguide (CPW) on which Microelectromechanical System (MEMS) capacitive switches are placed periodically. The tunable property is achieved, when the switches moves from up state with the capacitive gap 1.5 μm to down state having capacitive gap of 1 μm. A parametric analysis has been presented to check the sensitivity of the antenna in terms of S11 parameter by varying different parameters of the MEMS switches and CSRRs. This work, strives to improve the degree of reconfigurability with increase in the number of switches. The value of actuation voltage to move switch from up to down state is 10.4 V, which is very low over the other design. The switches exhibit fundamental frequency 14.6 kHz, switching time 28.59 μs, and capacitance ratio 15.27. Simulation has been carried out in Ansoft HFSS v. 13 and the distinct characterization property of the tunable antenna is shown through simulation.

A compact Ka‐band limiter‐low noise amplifier MMIC with high power capability

Abstract: This paper presents a 30–36 GHz limiter low‐noise amplifier (limiter‐LNA) MMIC for high power and high mobility millimeter‐wave radar systems. The PIN‐diode limiter network and the LNA are codesigned to realize high input‐power handling capability, good small‐signal performance, and small chip area. A two‐state matching capacitor is presented to improve both the input‐power handling capability at the high input‐power level and the input return loss at the small‐signal level. The proposed circuit is fabricated with a combined PIN/0.15‐µm‐GaAs‐pHEMT process. The limiter‐LNA is capable of handling 39 dBm continuous wave (CW) input‐power without failure with only two limiter stages. The measured noise figure is 1.8–2.5 dB, the small‐signal gain is 18.5 ± 0.5 dB, the output power at 1 dB compression point is larger than 11 dBm, and the dc power consumption is 72 mW. The chip area, including testing pads, is only 2.1 mm × 1.0 mm. This limiter‐LNA MMIC is believed to have the highest input‐power handling capability and smallest chip area among limiter‐LNA MMICs at this frequency range reported up to date.

Highly Robust 130 nm SiGe BiCMOS Power Limiter, LNA and Mixer IC for a Wideband 1.5 - 18 GHz MIMO Radar Receiver

Abstract: This work presents a highly robust 1.5 – 18 GHz high dynamic range power limiter, low noise amplifier (LNA) and mixer IC. A novel power limiter design concept is introduced, which stands out for its low capacitive behavior. The circuit withstands input power levels up to 25 dBm while demonstrating a good noise matching up to 18 GHz. The design approach features a distributed fully differential LNA and a double balanced common base input mixer to enhance the linearity and the wideband performance. The active power limiter, LNA and mixer IC was fabricated on a 130 nm SiGe BiCMOS technology, it draws a total of 62 mA from a 3 V DC power supply and the active IC area is 0.65 mm2.

Design, fabrication, characterization of micromachined capacitive shunt switches with low actuation voltages and low temperature packaging

Abstract: This paper reports the design, fabrication, electrical characterization and packaging of micromachined shunt capacitive switch with low actuation voltage. These switches are fabricated on a low resistive silicon substrate using only a four mask surface micromachining process. The co-planar waveguide is patterned using chrome/gold layer. Positive photoresist S1813 is used as the sacrificial layer. The top beam membrane is made of gold. The membranes are released through a wet release process through Piranha solution. Supercritical point drying tools were used for the top beam release after wet etching to provide anti-stiction. The switches are 300 µm long with 10 μm holes on the top membrane to lower both residual stress and pull-in voltages. These switches exhibit low actuation voltages in the range of 5.5–6.4 V. The RF characterization shows that these switches have low insertion loss and high isolation in the frequency range of interest. The packaging was carried out using commercially available surface mount style RF packages. However, the whole packaging process is performed under low temperature in order to free the MEMS structures of thermally induced stress which otherwise would affect the performance of the switch. The adhesion of the die to the bottom package is excellent and is tested by die shear test. The packaged switch has passed the non-destructive pull test.

The prediction of cut-off frequencies of models of gyroelectric waveguides using artificial neural networks

Abstract: Gyroelectric n and p type's waveguides were usually investigated using differential Maxwell's equations, coupled mode and partial area methods, coherent approaching, least square methods. Computation time of one particular model of this type of waveguide might take quite a long time and even to a couple of days using one of these analytical methods. The whole investigation may require a lot of time in the first stage of research until the right model of waveguide will be found. The artificial neural networks were adjusted for the investigation of gyroelectric n GaAs waveguides. Multilayer perceptron network was selected during investigation. Advantages of artificial neural networks comparing with analytical methods are presented in this paper. The investigation showed that difference between results, obtained using analytical methods, and results, obtained by using artificial neural networks, do not differ by more than 12%. On the other hand prediction using artificial neural networks is performed about 2000 times faster than using traditional methods.