S. Procz

TL;DR: The Medipix3RX chip as mentioned in this paper uses an architecture in which adjacent pixels communicate in the analog and digital domains on an event-by-event basis to reconstruct the deposited charge in a neighbourhood prior to the assignation of the hit to a single pixel.

TL;DR: In this article, the Medipix3RX ASIC features a network of charge summing circuits establishing a communication between pixels which helps to mitigate the effects of charge sharing between neighboring pixels and the emission of characteristic X-rays.

TL;DR: The Medipix3 chip as discussed by the authors is a hybrid pixel detector readout chip working in Single Photon Counting Mode (SPM) with a front-end architecture aimed at eliminating the spectral distortion produced by charge diffusion in highly segmented semiconductor detectors.

TL;DR: The characterization of the first Medipix3RX detector assembly with a 500 μm thick high resistivity, chromium compensated gallium arsenide sensor is presented, which is suitable for high resolution X-ray imaging applications.

TL;DR: In this paper, the authors present the development of optimized threshold adjustment masks with small energy windows of about 3 keV width using a monochromatic X-ray source for equalization.