International Technology Roadmap for Semiconductors 2003の要求清浄度について － シリコンウエハ表面と雰囲気環境に要求される清浄度, 分析方法の現状について －

Dielectric properties investigation of a compound based on atomic layer deposited multi-layer structure

TCAD Simulation and Capacitance-Voltage Characterization of High- κ MOS Structures

The increased demand for reliable and efficient energy storage capacitive devices has gained much attention in recent years. Developing a solid-state capacitor with substantially higher energy densities could transform power electronics and energy storage applications. In this work, it is demonstrated that dielectric/dielectric interfaces of certain common dielectrics (e.g., SiO2, Si3N4, and Al2O3) potentially have an anomalous interfacial polarizability component that is tangential to the interfaces, which has not been extensively studied. To explore this component, extensive experimental measurements of the capacitances of interdigitated electrode (IDE) devices are used to excite heterogenous dielectric interfaces with electric fields that are parallel to the planes of those interfaces. These nanofabricated IDE devices enable the authors to estimate the volumetric average of this component of polarizability. By combining repeatable and highly precise fabrication methods with electromagnetic finite element method (FEM) simulations, the average relative permittivity within a 1-nm thick volume at the interfaces of Si3N4/SiO2, Al2O3/SiO2, and Al2O3/Si3N4 are extracted to be <inline-formula> <tex-math notation="LaTeX">${k}_{\text {Si}_{{3}}\text {N}_{{4}}/\text {SiO}_{{2}}} = {1419}$ </tex-math></inline-formula>, <inline-formula> <tex-math notation="LaTeX">${k}_{\text {Al}_{{2}}\text {O}_{{3}}/\text {SiO}_{{2}}} = {2373}$ </tex-math></inline-formula>, and <inline-formula> <tex-math notation="LaTeX">${k}_{\text {Al}_{{2}}\text {O}_{{3}}/\text {Si}_{{3}}\text {N}_{{4}}} = {428}$ </tex-math></inline-formula>, <inline-formula> <tex-math notation="LaTeX">$\vphantom {^{\int }}$ </tex-math></inline-formula>respectively.

Interfacial Permittivity Characterization of Heterogeneous Dielectric Bi-Layers

A novel radiation-hardened 4-transistor (4T) complementary metal-oxide-semiconductor (CMOS) image sensor pixel is proposed, employing a through-silicon-via (TSV) based metal-semiconductor-metal (MSM) photodetector as the photosensitive element. The presented pixel structure is designed and simulated in 0.18 $\mu \mathbf{m}$ CMOS technology. It is shown that deploying the TSV-based MSM photodetector decreases the pixel sensitive area to 3 $\mu \mathbf{m}^{2}$ compared to conventional planar MSM ones, and enhances both the lower and higher wavelengths of the spectral response characteristic of the pixel as well. The designed pixel has a 2.75 $\mu \mathbf{m}$ radius circular structure, the dark current of 77 fA at 1 V reverse bias (at room temperature), a conversion gain of 116 $\mu \mathbf{V.e}^{-1}$ , a dynamic range of 58.62 dB, and an approximately linear spectral response in the range of 300 to 800 nm wavelengths of the incident light spectrum. The proposed pixel structure, enabled with a p+ guard ring, also demonstrates insignificant dark current degradation under gamma ray radiation of up to 1 Mrad.

A Radiation-Hardened Wide Spectral Response 4T CMOS Image Sensor Pixel Employing a Through-Silicon Via based Photodetector

A Metal-Insulator-Metal (MIM) capacitor with high capacitance, high breakdown voltage, and low leakage current is aspired so that the device can be applied in many electronic applications. The most significant factors that affect the MIM capacitor’s performance is the design and the dielectric materials used. In this study, MIM capacitors are simulated using different dielectric materials and different number of dielectric layers from two layers up to seven layers.  The effect of the different dielectric constants ( k ) to the performance of the MIM capacitors is also studied, whereas this work investigates the effect of using low- k and high- k dielectric materials. The dielectric materials used in this study with high- k are Al 2 O 3 and HfO 2 , while the low- k dielectric materials are SiO 2 and Si 3 N 4 . The results demonstrate that the dielectric materials with high- k produce the highest capacitance. Results also show that metal-Al 2 O 3 interfaces increase the performance of the MIM capacitors. By increasing the number of dielectric layers to seven stacks, the capacitance and breakdown voltage reach its highest value at 0.39 nF and 240 V, respectively.

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The Effect of Different Dielectric Materials in Designing High-Performance Metal-Insulator-Metal (MIM) Capacitors

This paper reports on the design, implementation, and characterization of a trench-filled capacitor in complementary Metal-Oxide-Semiconductor (CMOS) grade silicon. In order to achieve high capacitance value in MOS capacitor, trench technology is applied to improved capacitance. The simulation executed by using Synopsys's Sentaurus TCAD. A C-V measurement was done between two different structures of MOS capacitor which are using planar and trench technology. A MOS capacitor with planar technology achieved 4.5 fF meanwhile trench technology achieved a much higher capacitance which is 1.325 pF. A test of varied trench has also been carried out to verify the basic fundamentals of MOS capacitor. It shows that a deeper trench helps to increase higher capacitance.

S. S. Jamuar

Papers

The Effect of Different Dielectric Materials in Designing High-Performance Metal-Insulator-Metal (MIM) Capacitors

Effect on different geometric dimensions of metal-oxide-semiconductor capacitor by using TCAD simulation