S. Sengupta

Bio: S. Sengupta is an academic researcher from Indian Institute of Technology Kharagpur. The author has contributed to research in topics: Synchronous motor & Inverter. The author has an hindex of 11, co-authored 37 publications receiving 464 citations. Previous affiliations of S. Sengupta include Indian Institutes of Technology.

Epidemiology, clinical profile, management, and outcome of COVID-19-associated rhino-orbital-cerebral mucormycosis in 2826 patients in India - Collaborative OPAI-IJO Study on Mucormycosis in COVID-19 (COSMIC), Report 1.

Abstract: Purpose: COVID-19-associated rhino-orbital-cerebral mucormycosis (ROCM) has reached epidemic proportion during India's second wave of COVID-19 pandemic, with several risk factors being implicated in its pathogenesis. This study aimed to determine the patient demographics, risk factors including comorbidities, and medications used to treat COVID-19, presenting symptoms and signs, and the outcome of management. Methods: This was a retrospective, observational study of patients with COVID-19-associated ROCM managed or co-managed by ophthalmologists in India from January 1, 2020 to May 26, 2021. Results: Of the 2826 patients, the states of Gujarat (22%) and Maharashtra (21%) reported the highest number of ROCM. The mean age of patients was 51.9 years with a male preponderance (71%). While 57% of the patients needed oxygen support for COVID-19 infection, 87% of the patients were treated with corticosteroids, (21% for > 10 days). Diabetes mellitus (DM) was present in 78% of all patients. Most of the cases showed onset of symptoms of ROCM between day 10 and day 15 from the diagnosis of COVID-19, 56% developed within 14 days after COVID-19 diagnosis, while 44% had delayed onset beyond 14 days. Orbit was involved in 72% of patients, with stage 3c forming the bulk (27%). Overall treatment included intravenous amphotericin B in 73%, functional endoscopic sinus surgery (FESS)/paranasal sinus (PNS) debridement in 56%, orbital exenteration in 15%, and both FESS/PNS debridement and orbital exenteration in 17%. Intraorbital injection of amphotericin B was administered in 22%. At final follow-up, mortality was 14%. Disease stage >3b had poorer prognosis. Paranasal sinus debridement and orbital exenteration reduced the mortality rate from 52% to 39% in patients with stage 4 disease with intracranial extension (p < 0.05). Conclusion: : Corticosteroids and DM are the most important predisposing factors in the development of COVID-19-associated ROCM. COVID-19 patients must be followed up beyond recovery. Awareness of red flag symptoms and signs, high index of clinical suspicion, prompt diagnosis, and early initiation of treatment with amphotericin B, aggressive surgical debridement of the PNS, and orbital exenteration, where indicated, are essential for successful outcome.

Dual-Mode Multiple-Band Digital Controller for High-Frequency DC–DC Converter

Abstract: An integrated digital controller design for dc-dc converter is proposed in this paper. The proposal presents a multiple- band dual-stage (MBDS) delay line A/D converter (ADC) for wide dynamic range of operation with reduced ripple, chip area, and power consumption. This proposal also introduces a novel folding logic for digital error calculation and dual-mode error control PID for improving transient response. A complete closed-loop experimental prototype is demonstrated on a field-programmable-gate- array-based setup. The feasibility and functionality of the proposed digital controller is verified with a closed-loop synchronous buck converter prototype that switches at 1 MHz and regulates over a wide output voltage range of 1.6-3.3 V. The proposed MBDS delay line ADC is fabricated with discrete logic gates and flip-flops. The integrated digital controller is also implemented using standard cell-based design methodology in 0.5-mum CMOS technology. The design reduces 33 % on-chip area compared to an equivalent of 64 tap delay line ADC. The complete digital controller chip takes less than 0.7 mm2 of silicon area and consumes an average current of 92 muA at 1-MHz switching frequency. The voltage-mode digital loop achieves tracking time of less than 10 mus for 1-V step change of the reference voltage and settling time of 20 mus. Post layout simulation and experimental results are demonstrated.

Digital Controller for DVS-Enabled DC–DC Converter

Abstract: A high-frequency digital controller that includes an optimized analog-digital converter (ADC) with a novel formulation of digital error value based on target clock frequency and converter output voltage is presented in this paper. A programmable look-up table-based digital compensator is implemented for fast processing the feedback error. Limitations of a hybrid digital pulsewidth modulator (DPWM) at high frequency are addressed and solved by an edge-triggered logic. Support for process, voltage, and temperature variations is incorporated in the integrated design. Target clock frequency denotes the frequency of the signal which is driven by dynamic voltage scaling (DVS) processor and corresponds to the reference value of the regulated output voltage. This work realizes the classical digital controller design implementation of a target frequency to minimum required regulated voltage for DVS-enabled adaptive DC-DC converter. A synchronous buck converter of 1 MHz switching frequency and the proposed delay-line-based optimized ADC have been fabricated for realizing and verifying the complete digital controller on a field-programmable gate array-based closed-loop prototype. Experimental results are presented, which demonstrate the fast dynamic response achieved for target clock frequency in the range of 6-16 MHz, corresponding to the regulated output voltage range of 1.6-3.2 V. The complete design of digital controller has been implemented in 0.5 ?m CMOS technology using Cadence and Synopsys tools. The active on-chip area of the proposed delay-line ADC, digital compensator, and edge-triggered hybrid DPWM are 0.08, 0.28, and 0.07 mm2 respectively.

Indirect current control of a single-phase voltage-sourced boost-type bridge converter operated in the rectifier mode

Abstract: An H-bridge transistorized converter intended for front-end power conversion at a high power-factor and a constant desired output voltage has been analyzed. The state-space model of the H-bridge converter controlled by the bipolar pulse width modulated (PWM) technique is described and the expressions for the equilibrium points of operation of the state variables corresponding to the circuit parameters have been derived. The converter is intended for use as a voltage source feeding an inverter. Hence the requirement of maintaining a desired DC voltage at its output becomes necessary. Transient behavior of two control strategies have been tested to examine their performance in stabilising the converter at the desired operating state. Comparison of the two feedback strategies has been done by simulation studies and the one that was found superior has been experimentally implemented. The experimental implementation of the controller for the converter operation in the rectifier mode is also described. The experimental results obtained are presented and compared with simulation results to validate the controller's performance under transient conditions.

Conducted EMI Mitigation Techniques for Switch-Mode Power Converters: A Survey

Abstract: Several techniques to mitigate conducted electromagnetic interference (EMI) in switch-mode power supplies (SMPS) have been reported in literature. Of these, this paper reviews those techniques that are primarily meant for ac-dc and dc-dc power converters. The techniques are broadly classified based on two criteria-1) reduction of the noise after generation and 2) reduction of the noise at the generation stage itself. A detailed classification and review of various noise mitigation techniques currently available in literature are presented. It is believed that the classification and review of the conducted EMI mitigation techniques presented in this paper would be useful to SMPS researchers and designers.

Current-Source Converter and Cycloconverter Topologies for Industrial Medium-Voltage Drives

Abstract: This paper, along with an earlier published paper as Part 1, provides a comprehensive review of the state of the art of high-power converters (above 1 MW) for adjustable-speed ac drives. In this highly active area, different converter topologies have been developed for various drive applications in the industry. Due to its extensive coverage, the subject is divided into two parts: multilevel voltage source and current source converter topologies. This paper is focused on the second part and covers the current source converter technologies, including pulsewidth-modulated current-source inverters (CSIs) and load-commutated inverters. In addition, this paper also addresses the present status of the direct converter, which is also known as cycloconverter (CCV). This paper focuses on the latest CSI and CCV technologies and an overview of the commonly used modulation schemes. It also provides the latest technological advances and future trends in CSI- and CCV-fed large drives. This paper serves as a useful reference for academic researchers and practicing engineers in the field of power converters and adjustable-speed drives.

Model Reference Adaptive Control Design for a Shunt Active-Power-Filter System

Abstract: In this paper, model reference adaptive control (MRAC) is proposed for a single-phase shunt active power filter (APF) to improve line power factor and to reduce line current harmonics. The proposed APF controller forces the supply current to be sinusoidal, with low current harmonics, and to be in phase with the line voltage. The advantages of using MRAC over conventional proportional-integral control are its flexibility, adaptability, and robustness; moreover, MRAC can self-tune the controller gains to assure system stability. Since the APF is a bilinear system, it is hard to design the controller. This paper will solve the stability problem when a linearization method is used to solve the nonlinearity of the system. Moreover, by using Lyapunov's stability theory and Barbalat's lemma, an adaptive law is designed to guarantee an asymptotic output tracking of the system. To verify the proposed APF system, a digital signal controller (dsPIC30F4012) is adopted to implement the algorithm of MRAC, and a 1-kVA laboratory prototype is built to test feasibility. Experimental results are provided to verify the performance of the proposed APF system.

A DQ Synchronous Reference Frame Current Control for Single-Phase Converters

Abstract: This paper presents a current control using the dq synchronous reference frame for single-phase converters. This control method consists in transforming an orthogonal pair composed by the actual single-phase input current and a fictitious current, from a stationary to a rotating frame. The steady state current components in dq frame become DC instead of AC values so a zero error current control can be implemented. A single-phase PFC boost rectifier is used as an example application of this control. To validate the control method simulation and experimental results are presented

Deadbeat Predictive Power Control of Single-Phase Three-Level Neutral-Point-Clamped Converters Using Space-Vector Modulation for Electric Railway Traction

Abstract: This paper presents an alternative approach to address the control and modulation problem of single-phase three-level converters applied in the high-speed railway electrical traction drive system. Following the principle of deadbeat predictive direct torque control of ac motors, this paper discusses an improved direct power control (DPC) method based on a deadbeat active and reactive power prediction technique. Comparing with the conventional PI-based DPC scheme, the proposed deadbeat predictive DPC scheme can provide these advantageous features: lower current harmonics and THD index, lower active and reactive power ripples, and fewer adjusted parameters. Moreover, compared with PI-based DPC with the PI parameters optimization, this approach can also easily obtain fast dynamic response but without the main voltage orientation. A single-phase three-level space vector pulse width modulation (SVPWM) with inherent neutral-point voltage balancing capability is adopted, which can be combined with DPC scheme as an overall control and modulation system. A series of simulation and experimental tests have been conducted to demonstrate an excellent performance of the deadbeat predictive DPC. In addition, the neutral-point-voltage balancing ability of the adopted SVPWM method has been verified.