S
Salvador Mir
Researcher at University of Grenoble
Publications - 243
Citations - 2449
Salvador Mir is an academic researcher from University of Grenoble. The author has contributed to research in topics: Automatic test pattern generation & Built-in self-test. The author has an hindex of 25, co-authored 235 publications receiving 2273 citations. Previous affiliations of Salvador Mir include Spanish National Research Council & University of Manchester.
Papers
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Proceedings ArticleDOI
Defect Filter for Alternate RF Test
TL;DR: A novel nonlinear defect filter based on an estimate of the joint probability density function of the alternate measurements is presented, which does not require a defect dictionary and can accommodate any underlying density without needing any prior knowledge regarding its parametric form.
Journal ArticleDOI
Evaluation of Analog/RF Test Measurements at the Design Stage
TL;DR: A method that is capable of handling process variations to evaluate analog/RF test measurements at the design stage and provides a general framework to compare alternative test solutions that are continuously being proposed toward reducing the high cost of specification-based tests is presented.
Journal ArticleDOI
Fault-based ATPG for linear analog circuits with minimal size multifrequency test sets
TL;DR: An automatic test pattern generation (ATPG) procedure for linear analog circuits is presented and the self-test approaches are compared in terms of the fault coverage and the fault diagnosability achieved.
Journal ArticleDOI
Diagnosis of Local Spot Defects in Analog Circuits
TL;DR: The method aims to identify a subset of defects that are likely to have occurred and suggests to give them priority in a classical failure analysis and is demonstrated on an industrial large-scale case study.
Proceedings ArticleDOI
Electrically induced stimuli for MEMS self-test
TL;DR: This work describes, for three different types of MEMS that work in different energy domains, how the required nonelectrical test stimuli can be induced onchip by means of electrical signals, which provides the basis for adding BIST strategies for MEMS parts embedded in the coming generation of integrated systems.