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Samira Sayedsalehi

Bio: Samira Sayedsalehi is an academic researcher from Islamic Azad University. The author has contributed to research in topics: Quantum dot cellular automaton & Logic gate. The author has an hindex of 13, co-authored 25 publications receiving 819 citations. Previous affiliations of Samira Sayedsalehi include Shahid Beheshti University & Islamic Azad University South Tehran Branch.

Papers
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Journal ArticleDOI
TL;DR: Simulation results demonstrate that the proposed design of majority gates and Full-Adder resulted in significant improvements in designing logical circuits.
Abstract: Science and Research Branch of IAU, Tehran, IranQuantum-dot Cellular Automata (QCA) is one of the most attractive technologies for computing atnano-scale. The principle logic element in QCA is majority gate. In this paper, a novel design for5-input majority gate is presented. A 5-input majority gate study has been proposed; however thisstudy has changed the scheme of basic QCA cells. The new proposed device reduces cell countsand area and uses conventional form of QCA cells. Accuracy of this design is proven by applyingsome simple physical substantiation and QCADesigner tool is used for verifying majority circuitlayout and functionality. Furthermore, a QCA Full-Adder is constructed using the new proposeddesign. Simulation results demonstrate that the proposed design of majority gates and Full-Adderresulted in significant improvements in designing logical circuits.

180 citations

Journal ArticleDOI
TL;DR: A comprehensive power dissipation analysis as well as a structural analysis over the previously published five-input majority gates is performed and reveals that the proposed designs have significant improvements in contrast to counterparts from implementation requirements and power consumption aspects.

151 citations

Journal ArticleDOI
TL;DR: A new robust five-input majority gate is first presented, which is appropriate for implementation of simple and efficient QCA circuits in single layer and has a simple and robust structure that helps achieving minimal area, as well as reduction in hardware requirements and clocking zone numbers.

143 citations

Journal ArticleDOI
TL;DR: A novel 5-input majority gate, an important fundamental building block in QCA circuits, is designed in a symmetric form and demonstrated to perform equally well or in many cases better than previous circuits.
Abstract: By the inevitable scaling down of the feature size of the MOS transistors which are deeper in nanoranges, the CMOS technology has encountered many critical challenges and problems such as very high leakage currents, reduced gate control, high power density, increased circuit noise sensitivity and very high lithography costs. Quantum-dot cellular automata (QCA) owing to its high device density, extremely low power consumption and very high switching speed could be a feasible competitive alternative. In this paper, a novel 5-input majority gate, an important fundamental building block in QCA circuits, is designed in a symmetric form. In addition to the majority gate, a SR latch, a SR gate and an efficient one bit QCA full adder are implemented employing the new 5-input majority gate. In order to verify the functionality of the proposed designs, QCADesigner tool is used. The results demonstrate that the proposed SR latch and full adder perform equally well or in many cases better than previous circuits.

91 citations

Journal ArticleDOI
TL;DR: This study presents a novel approach to designing efficient QCA-based circuits based on Boolean expressions achieved from reconfiguration of five-input and three-input majority gates, and simple and dense multiplexer and Exclusive-or structures are implemented.
Abstract: Quantum-dot cellular automata (QCA) are a transistorless computation approach which encodes binary information via configuration of charges among quantum dots. The fundamental QCA logic primitives are majority and inverter gates which can be utilized to design various QCA circuits. This study presents a novel approach to designing efficient QCA-based circuits based on Boolean expressions achieved from reconfiguration of five-input and three-input majority gates. Whereas the multiplexer and Exclusive-or are the most important fundamental logical circuits in digital systems, designing efficient and single layer structures without coplanar cross-over wiring is advantageous in QCA technology. In order to demonstrate the efficiency and usefulness of the proposed approach, simple and dense multiplexer and Exclusive-or structures are implemented. The proposed designs have significant improvement in terms of area, complexity, latency, and gate count in comparison to previous designs. The correct logical functionalities of presented structures have been authenticated using QCA designer tool.

76 citations


Cited by
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Journal ArticleDOI
01 Dec 2016
TL;DR: In current study, the new layout of all single bit full adders in the quantum cellular automata's technology is introduced and in comparison with existing schemes, the suggested circuit has fewer cells and smaller area.
Abstract: Physical limitations for CMOS technology have provided the way for manufacturing the quantum cellular automata technology-based hardware elements at Nano level. From the purpose of very high speed, area and low power consumption, this Nanotechnology has been taken into consideration. Improving their structures will lead promoting the system performance completely, because the Full adders are assumed as major and primary component of computational processors. In current study, the new layout of all single bit full adders in the quantum cellular automata's technology is introduced. In comparison with existing schemes, the suggested circuit has fewer cells and smaller area.

224 citations

Journal ArticleDOI
TL;DR: These circuits are designed based on the unique properties of CNFETs, such as the capability of setting the desired threshold voltage by changing the diameters of the nanotubes, which makes them very suitable for the multiple- V t design method.
Abstract: Novel high-performance ternary circuits for nanotechnology are presented here. Each of these carbon nanotube field-effect transistor (CNFET)-based circuits implements all the possible kinds of ternary logic, including negative, positive and standard ternary logics, in one structure. The proposed designs have good driving capability and large noise margins and are robust. These circuits are designed based on the unique properties of CNFETs, such as the capability of setting the desired threshold voltage by changing the diameters of the nanotubes. This property of CNFETs makes them very suitable for the multiple- V t design method. The proposed circuits are simulated exhaustively, using Synopsys HSPICE with 32 nm-CNFET technology in various test situations and different supply voltages. Simulation results demonstrate great improvements in terms of speed, power consumption and insusceptibility to process variations with respect to other conventional and state-of-the-art 32 nm complementary metal-oxide semiconductor and CNFET-based ternary circuits. For instance at 0.9 V, the proposed ternary logic and arithmetic circuits consume on average 53 and 40 less energy, respectively, compared to the CNFET-based ternary logic and arithmetic circuits, recently proposed in the literature.

202 citations

Journal ArticleDOI
TL;DR: A comprehensive power dissipation analysis as well as a structural analysis over the previously published five-input majority gates is performed and reveals that the proposed designs have significant improvements in contrast to counterparts from implementation requirements and power consumption aspects.

151 citations

Journal ArticleDOI
TL;DR: A new robust five-input majority gate is first presented, which is appropriate for implementation of simple and efficient QCA circuits in single layer and has a simple and robust structure that helps achieving minimal area, as well as reduction in hardware requirements and clocking zone numbers.

143 citations

Journal ArticleDOI
TL;DR: Using a robust 2:1 multiplexer, efficient level triggered and edge triggered QCA D flip flops and a memory cell with set/reset ability will be introduced and results demonstrate that the proposed desgins have efficient structures in terms of area, delay and complexity.

134 citations