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Sanjay Pant
Researcher at Apple Inc.
Publications - 43
Citations - 3939
Sanjay Pant is an academic researcher from Apple Inc.. The author has contributed to research in topics: Voltage & Clock signal. The author has an hindex of 19, co-authored 43 publications receiving 3830 citations. Previous affiliations of Sanjay Pant include Nvidia & Advanced Micro Devices.
Papers
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Proceedings ArticleDOI
Razor: a low-power pipeline based on circuit-level timing speculation
Daniel J. Ernst,Nam Sung Kim,Shidhartha Das,Sanjay Pant,Rajeev R. Rao,Toan Pham,Conrad H. Ziesler,David Blaauw,Todd Austin,Krisztian Flautner,Trevor Mudge +10 more
TL;DR: A solution by which the circuit can be operated even below the ‘critical’ voltage, so that no margins are required and thus more energy can be saved.
Journal ArticleDOI
RazorII: In Situ Error Detection and Correction for PVT and SER Tolerance
Shidhartha Das,Carlos Tokunaga,Sanjay Pant,Wei-Hsiang Ma,S. Kalaiselvan,Kevin Lai,David Michael Bull,David Blaauw +7 more
TL;DR: This paper presents a design (RazorII) which implements a flip-flop with in situ detection and architectural correction of variation-induced delay errors and demonstrates SER tolerance on the RazorII processor through radiation experiments.
Journal ArticleDOI
A self-tuning DVS processor using delay-error detection and correction
Shidhartha Das,David D. Roberts,Seokwoo Lee,Sanjay Pant,David Blaauw,Todd Austin,Krisztian Flautner,Trevor Mudge +7 more
TL;DR: A dynamic voltage scaling (DVS) technique called Razor is presented which incorporates an in situ error detection and correction mechanism to recover from timing errors and achieves an average energy savings of 50% over worst case operating conditions.
Proceedings ArticleDOI
Razor II: In Situ Error Detection and Correction for PVT and SER Tolerance
David Blaauw,S. Kalaiselvan,K. Lai,Wei-Hsiang Ma,Sanjay Pant,Carlos Tokunaga,Shidhartha Das,David Michael Bull +7 more
TL;DR: A Razor II approach is proposed that introduces two components: first, instead of performing both error detection and correction in the FF, Razor II performs only detection in theFF, while correction is performed through architectural replay.
Proceedings ArticleDOI
A self-tuning DVS processor using delay-error detection and correction
Shidhartha Das,Sanjay Pant,David D. Roberts,Seokwoo Lee,David Blaauw,Todd Austin,Trevor Mudge,Krisztian Flautner +7 more
TL;DR: A 64bit processor fabricated in 0.18/spl mu/m technology employs delay-error detection and correction scheme called Razor to eliminate voltage safety margins and scale voltage 120mV below the first failure point to achieve 44% energy savings over the worst case operating conditions.