Showing papers by "Sanjeevikumar Padmanaban published in 2004"
26 Oct 2004
TL;DR: An approach for selecting critical paths along which testable path delay faults can exist is presented and an implicit method to eliminate untestable faults along the selected paths is presented.
Abstract: An approach for selecting critical paths along which testable path delay faults can exist is presented. The proposed method is particularly helpful on path intensive circuits. Critical paths are selected implicitly with the aid of a combination of decision diagrams. An implicit method to eliminate untestable faults along the selected paths is also presented. The effectiveness of the approach is demonstrated on path intensive ISCAS'85, ISCAS'89 and ITC'99 benchmarks.
33 citations