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Design Of Analog Cmos Integrated Circuits

Channel estimation is challenging for the reconfigurable intelligent surface (RIS)-aided wireless communications. Since the number of coefficients of the cascaded channel among the base station (BS), the RIS, and the user equipment (UE), is the product of the number of BS antennas, the number of RIS elements, and the number of UEs, the pilot overhead can be prohibitively high. In this paper, we propose a two-timescale channel estimation framework to exploit the property that the BS-RIS channel is high-dimensional but quasi-static, while the RIS-UE channel is mobile but low-dimensional. Specifically, to estimate the quasi-static BS-RIS channel, we propose a dual-link pilot transmission scheme, where the BS transmits downlink pilots and receives uplink pilots reflected by the RIS. Then, we propose a coordinate descent-based algorithm to recover the BS-RIS channel. Since the quasi-static BS-RIS channel is estimated less frequently than the mobile channel is, the average pilot overhead can be reduced from a long-term perspective. Although the mobile RIS-UE channel has to be frequently estimated in a small timescale, the associated pilot overhead is low thanks to its low dimension. Simulation results show that the proposed two-timescale channel estimation framework can achieve accurate channel estimation with low pilot overhead.

Two-Timescale Channel Estimation for Reconfigurable Intelligent Surface Aided Wireless Communications

This expanded and thoroughly revised edition of Thomas H. Lee's acclaimed guide to the design of gigahertz RF integrated circuits features a completely new chapter on the principles of wireless systems. The chapters on low-noise amplifiers, oscillators and phase noise have been significantly expanded as well. The chapter on architectures now contains several examples of complete chip designs that bring together all the various theoretical and practical elements involved in producing a prototype chip. First Edition Hb (1998): 0-521-63061-4 First Edition Pb (1998); 0-521-63922-0

The Design of CMOS Radio-Frequency Integrated Circuits: RF CIRCUITS THROUGH THE AGES

Recent work by Bank, and Mazzanti and Andreani has offered a general result concerning phase noise in nearly-sinusoidal inductance-capacitance (LC) oscillators; namely that the noise factor of such oscillators (under certain achievable conditions) is largely independent of the specific operation of individual transistors in the active circuitry. Both use the impulse sensitivity function (ISF). In this work, we show how the same result can be obtained by generalizing the phasor-based analysis. Indeed, as applied to nearly-sinusoidal LC oscillators, we show how the two approaches are equivalent. We analyze the negative-gm LC model and present a simple equation that quantifies output noise resulting from phase fluctuations. We also derive an expression for output noise resulting from amplitude fluctuations. Further, we extend the analysis to consider the voltage-biased LC oscillator and fully differential CMOS LC oscillator, for which the Bank's general result does not apply. Thus we quantify the concept of loaded Q.

Phase Noise in LC Oscillators: A Phasor-Based Analysis of a General Result and of Loaded $Q$

A lateral bipolar junction transistor having improved current gain and a method for forming the same are provided. The transistor includes a well region of a first conductivity type formed over a substrate, at least one emitter of a second conductivity type opposite the first conductivity type in the well region wherein each of the at least one emitters are interconnected, a plurality of collectors of the second conductivity type in the well region wherein the collectors are interconnected to each other, and a plurality of base contacts of the first conductivity type in the well region wherein the base contacts are interconnected to each other. Preferably, all sides of the at least one emitters are adjacent the collectors, and none of the base contacts are adjacent the sides of the emitters. The neighboring emitter, collectors and base contacts are separated by spacings in the well region.

High-gain vertex lateral bipolar junction transistor

Cellular phones in emerging markets have continued to grow with multimedia features such as MP3 playback, video encode and decode, high-resolution cameras and web browsing. To efficiently support multimedia functionalities, highperformance modems are required. There is also a strong demand to reduce the cellular phone PCB footprint, and to enable integration of peripheral devices such as Bluetooth and Wireless LAN. Previously reported SoC or SiP solutions have integrated a GPRS/EDGE radio with modem and limited multimedia capabilities [1–4]. This paper presents a multimode UMTS/GSM RF transceiver integrated with a digital baseband having advanced multimedia functionalities. The SoC, designed in 65nm digital CMOS, supports quad-band GSM/GPRS/EDGE (3GPP R4, Class 12) and tri-band UMTS/WCDMA (3GPP R99, R5 cat 5/6), including band 1–2–4–5–6–8–9–10.

A 65nm CMOS SoC with embedded HSDPA/EDGE transceiver, digital baseband and multimedia processor

A tuned-input tuned-output (TITO) VCO utilizes two resonant-tanks to achieve a low measured phase noise of 130.5 dBc/Hz @ 1 MHz offset from 2.5 GHz center frequency. Improvement in phase noise is achieved with comparable power consumption and tuning range compared to a cross-coupled VCO topology. A TITO cell similar to that in the VCO is used as a common-source amplifier in a current-reuse configuration cascaded with a -boosted common-gate amplifier to realize a high gain (20 dB), low power (2.7 mW) LNA. A technique to improve the linearity of the current-reuse LNA is also presented.

CMOS VCO and LNA Using Tuned-Input Tuned-Output Circuits

The fundamental problem in the design of a full-duplex radio is the cancellation of the self-interference (SI) signal generated by the transmitter. Current techniques for suppressing SI rely on generating a copy of the SI signal and subtracting it partly in the radio frequency (RF) and digital domains. A critical step in replicating the self-interference is the estimation of the multipath channel through which the transmitted signal propagates to the antenna. Since there is no prior model on the number of multipath reflections, current techniques assume a tap delay line filter (in the RF and digital domain) with a large number of taps, and estimate the taps in the analog and the digital domain. In this paper, using a linearization technique, we show that the self-interference channel in an indoor environment can be effectively modeled as $H(f)=C_{0} - C_{1}f$ in the frequency domain. Thus, the effective self-interference channel can be represented by two parameters $C_{0}$ and $C_{1}$ , irrespective of the multipath environment. We also provide experimental evidence to verify the above channel model and propose novel low-complexity designs for self-interference cancellation.

A Taylor Series Approximation of Self-Interference Channel in Full-Duplex Radios

Selectable sizes for a local oscillator (LO) buffer and mixer are disclosed. In an exemplary embodiment, LO buffer and/or mixer size may be increased when a receiver or transmitter operates in a high gain mode, while LO buffer and/or mixer size may be decreased when the receiver or transmitter operates in a low gain mode. In an exemplary embodiment, LO buffer and mixer sizes are increased and decreased in lock step. Circuit topologies and control schemes for specific exemplary embodiments of LO buffers and mixers having adjustable size are disclosed.

Local oscillator buffer and mixer having adjustable size

A circuit receives a first signal (for example, a baseband signal) and mixes it with a local oscillator (LO) signal, and outputs a second signal (for example, an RFOUT signal). The circuit includes multiple identical Mixer and Frequency Divider Pair (MFDP) circuits. Each MFDP can be enabled separately. Each MFDP includes a mixer and a frequency divider that provides the mixer with a local version of the LO signal. The MFDP outputs are coupled together so that the output power of the second signal (RFOUT) is the combined output powers of the various MFDPs. By controlling the number of enabled MFDPs, the output power of the second signal is controlled. Because the MFDPs all have identical layouts, accuracy of output power step size is improved. Because LO signal power within the circuit automatically changes in proportion to the number of enabled MFDPs, local oscillator leakage problems are avoided.

Sankaran Aniruddhan

Papers

A 65nm CMOS SoC with embedded HSDPA/EDGE transceiver, digital baseband and multimedia processor

CMOS VCO and LNA Using Tuned-Input Tuned-Output Circuits

A Taylor Series Approximation of Self-Interference Channel in Full-Duplex Radios

Local oscillator buffer and mixer having adjustable size

Mixer with high output power accuracy and low local oscillator leakage