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Author

Shahin Nazarian

Other affiliations: Magma Design Automation
Bio: Shahin Nazarian is an academic researcher from University of Southern California. The author has contributed to research in topics: Logic gate & Smart grid. The author has an hindex of 18, co-authored 121 publications receiving 1420 citations. Previous affiliations of Shahin Nazarian include Magma Design Automation.


Papers
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TL;DR: The portability and reusability of the UVM standard allows the VeriSFQ framework to serve as a foundation for future SFQ semi-formal verification techniques, and an SFQ verification benchmark consisting of combinational SFQ circuits that exemplify SFQ logic properties are proposed.
Abstract: In this paper, we propose a semi-formal verification framework for single-flux quantum (SFQ) circuits called VeriSFQ, using the Universal Verification Methodology (UVM) standard. The considered SFQ technology is superconducting digital electronic devices that operate at cryogenic temperatures with active circuit elements called the Josephson junction, which operate at high switching speeds and low switching energy - allowing SFQ circuits to operate at frequencies over 300 gigahertz. Due to key differences between SFQ and CMOS logic, verification techniques for the former are not as advanced as the latter. Thus, it is crucial to develop efficient verification techniques as the complexity of SFQ circuits scales. The VeriSFQ framework focuses on verifying the key circuit and gate-level properties of SFQ logic: fanout, gate-level pipeline, path balancing, and input-to-output latency. The combinational circuits considered in analyzing the performance of VeriSFQ are: Kogge-Stone adders (KSA), array multipliers, integer dividers, and select ISCAS'85 combinational benchmark circuits. Methods of introducing bugs into SFQ circuit designs for verification detection were experimented with - including stuck-at faults, fanout errors, unbalanced paths, and functional bugs like incorrect logic gates. In addition, we propose an SFQ verification benchmark consisting of combinational SFQ circuits that exemplify SFQ logic properties and present the performance of the VeriSFQ framework on these benchmark circuits. The portability and reusability of the UVM standard allows the VeriSFQ framework to serve as a foundation for future SFQ semi-formal verification techniques.

3 citations

Proceedings ArticleDOI
15 Nov 2004
TL;DR: To accurately compute timing information associated with signal transitions, the XIDEN framework is enhanced with enhanced static timing analysis procedures that take into consideration single and multiple capacitive crosstalk couplings in a circuit.
Abstract: This paper deals with filter development in XIDEN, a "pruning " tool used to identify crosstalk targets that can potentially create Boolean errors. XIDEN employs multiple tools to adoptively estimate and/or extract electrical parameters required by its filters, and uses a novel approach to construct an efficient sequence of extractors and filters that are applied to a circuit. Thus, an initially enormous collection of targets can usually be reduced to a very small set of targets via a vectorless process. This process flow is much more efficient than using ATPG without pruning to identify targets that represent faults. The XIDEN framework, including the filters that capture the effect of crosstalk-induced pulses, has been previously presented. In this paper, our focus is on filters associated with crosstalk induced slowdown targets. To accurately compute timing information associated with signal transitions, we have enhanced the XIDEN framework with enhanced static timing analysis procedures that take into consideration single and multiple capacitive crosstalk couplings in a circuit.

3 citations

Proceedings ArticleDOI
TL;DR: Analysis and validation results show that SANSCrypt offers a substantial output corruptibility if the key sequences are applied incorrectly, and exhibits an exponential resilience to existing attacks, including SAT-based attacks, while maintaining a reasonably low overhead.
Abstract: We propose SANSCrypt, a novel sequential logic encryption scheme to protect integrated circuits against reverse engineering. Previous sequential encryption methods focus on modifying the circuit state machine such that the correct functionality can be accessed by applying the correct key sequence only once. Considering the risk associated with one-time authentication, SANSCrypt adopts a new temporal dimension to logic encryption, by requiring the user to sporadically perform multiple authentications according to a protocol based on pseudo-random number generation. Analysis and validation results on a set of benchmark circuits show that SANSCrypt offers a substantial output corruptibility if the key sequences are applied incorrectly. Moreover, it exhibits an exponential resilience to existing attacks, including SAT-based attacks, while maintaining a reasonably low overhead.

2 citations

01 Jan 2008
TL;DR: In this article, a detailed analysis of the crosstalk-affected delay of coupled interconnects considering process variations is presented, where a distributed RC-based model of the interconnections is used to accurately model process variations.
Abstract: This paper presents a detailed analysis of the crosstalk-affected delay of coupled interconnects considering process variations. We utilize a distributed RC- model of the interconnections to accurately model process variations. In particular, we perform a detailed investigation of various crosstalk scenarios and study the impact of different parameters on crosstalk delay. While accounting for the effect of correlations among parameters of the neighboring wire segments, statistical properties of the crosstalk-affected propagation delays are characterized and discussed. Monte Carlo-based simulations using Spice demonstrate the effectiveness of the proposed approach in accurately modeling the correlation-aware process variations and their impact on interconnect delay in the presence of crosstalk.

2 citations

Proceedings ArticleDOI
05 Oct 2020
TL;DR: SANSCrypt as mentioned in this paper adopts a new temporal dimension to logic encryption, by requiring the user to sporadically perform multiple authentications according to a protocol based on pseudorandom number generation.
Abstract: We propose SANSCrypt, a novel sequential logic encryption scheme to protect integrated circuits against reverse engineering. Previous sequential encryption methods focus on modifying the circuit state machine such that the correct functionality can be accessed by applying the correct key sequence only once. Considering the risk associated with one-time authentication, SANSCrypt adopts a new temporal dimension to logic encryption, by requiring the user to sporadically perform multiple authentications according to a protocol based on pseudorandom number generation. Analysis and validation results on a set of benchmark circuits show that SANSCrypt offers a substantial output corruptibility if the key sequences are applied incorrectly. Moreover, it exhibits an exponential resilience to existing attacks, including SAT-based attacks, while maintaining a reasonably low overhead.

2 citations


Cited by
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Journal ArticleDOI

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08 Dec 2001-BMJ
TL;DR: There is, I think, something ethereal about i —the square root of minus one, which seems an odd beast at that time—an intruder hovering on the edge of reality.
Abstract: There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality. Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

33,785 citations

Journal ArticleDOI
TL;DR: In this article, a review of thermal transport at the nanoscale is presented, emphasizing developments in experiment, theory, and computation in the past ten years and summarizes the present status of the field.
Abstract: A diverse spectrum of technology drivers such as improved thermal barriers, higher efficiency thermoelectric energy conversion, phase-change memory, heat-assisted magnetic recording, thermal management of nanoscale electronics, and nanoparticles for thermal medical therapies are motivating studies of the applied physics of thermal transport at the nanoscale. This review emphasizes developments in experiment, theory, and computation in the past ten years and summarizes the present status of the field. Interfaces become increasingly important on small length scales. Research during the past decade has extended studies of interfaces between simple metals and inorganic crystals to interfaces with molecular materials and liquids with systematic control of interface chemistry and physics. At separations on the order of ∼1 nm, the science of radiative transport through nanoscale gaps overlaps with thermal conduction by the coupling of electronic and vibrational excitations across weakly bonded or rough interface...

1,307 citations

Journal ArticleDOI
TL;DR: This paper provides a comprehensive review of various DR schemes and programs, based on the motivations offered to the consumers to participate in the program, and presents various optimization models for the optimal control of the DR strategies that have been proposed so far.
Abstract: The smart grid concept continues to evolve and various methods have been developed to enhance the energy efficiency of the electricity infrastructure. Demand Response (DR) is considered as the most cost-effective and reliable solution for the smoothing of the demand curve, when the system is under stress. DR refers to a procedure that is applied to motivate changes in the customers' power consumption habits, in response to incentives regarding the electricity prices. In this paper, we provide a comprehensive review of various DR schemes and programs, based on the motivations offered to the consumers to participate in the program. We classify the proposed DR schemes according to their control mechanism, to the motivations offered to reduce the power consumption and to the DR decision variable. We also present various optimization models for the optimal control of the DR strategies that have been proposed so far. These models are also categorized, based on the target of the optimization procedure. The key aspects that should be considered in the optimization problem are the system's constraints and the computational complexity of the applied optimization algorithm.

854 citations

Book ChapterDOI
01 Jan 2022

818 citations