Shamim Ahmed

Bio: Shamim Ahmed is an academic researcher from University of Arkansas. The author has contributed to research in topics: CMOS & Integrated circuit. The author has an hindex of 11, co-authored 21 publications receiving 358 citations. Previous affiliations of Shamim Ahmed include Qualcomm & East West University.

Datasheet Driven Silicon Carbide Power MOSFET Model

Abstract: A compact model for SiC Power MOSFETs is presented. The model features a physical description of the channel current and internal capacitances and has been validated for dc, CV, and switching characteristics with measured data from a 1200-V, 20-A SiC power MOSFET in a temperature range of 25°C to 225°C. The peculiar variation of on-state resistance with temperature for SiC power MOSFETs has also been demonstrated through measurements and accounted for in the developed model. In order to improve the user experience with the model, a new datasheet driven parameter extraction strategy has been presented which requires only data available in device datasheets, to enable quick parameter extraction for off-the-shelf devices. Excellent agreement is shown between measurement and simulation using the presented model over the entire temperature range.

Complex High-Temperature CMOS Silicon Carbide Digital Circuit Designs

Abstract: The need for dependable digital circuitry with the capability to operate reliably in high-temperature environments has been increasing drastically in applications such as automobile, aerospace, oil exploration, and power electronics. However, wide temperature swings significantly alter the threshold voltage of individual transistors, which adversely affects circuit timing in traditional synchronous designs. Such timing changes may in turn violates the setup and hold times of the clocked components, leading to potential circuit failure. This paper presents a complex digital integrated circuit design methodology using both synchronous and asynchronous logic for comparison in a young silicon carbide (SiC) design process developed by Raytheon UK. Seventeen circuits were designed, fabricated, and tested with results showing correct operation at temperatures at and above the target temperature of 300 °C.

A SiC CMOS Linear Voltage Regulator for High-Temperature Applications

Abstract: The first SiC integrated circuit linear voltage regulator is reported. The voltage regulator uses a 20-V supply and generates an output of 15 V, adjustable down to 10 V. It was designed for loads of up to 2 A over a temperature range of 25-225 °C. It was, however, successfully tested up to 300 °C. The voltage regulator demonstrated load regulations of 1.49% and 9% for a 2-A load at temperatures of 25 and 300 °C, respectively. However, the load regulation is less than 2% up to 300 °C for a 1-A load. The line regulation with a 2-A load at 25 and 300 °C was 17 and 296 mV/V, respectively. The regulator was fabricated in a Cree 4H-SiC 2-μm experimental process and consists of 1000, 32/2-μm NMOS depletion MOSFETs as the pass device, an integrated error amplifier with enhancement MOSFETs, and resistor loads, and uses external feedback and compensation networks to ensure operational integrity. It was designed to be integrated with high-voltage vertical power MOSFETs on the same SiC substrate. It also serves as a guide to future attempts for voltage regulation in any type of integrated SiC circuitry.

An Integrated SiC CMOS Gate Driver for Power Module Integration

Abstract: With high-temperature power devices available, the support circuitry required for efficient operation, such as a gate driver, is needed as part of a complete high-temperature solution. The design of an integrated silicon carbide (SiC) gate driver using a 1.2-μm complementary metal–oxide–semiconductor (CMOS) process is presented. Adjustable drive strength is added to facilitate a minimal external component requirement for high-temperature power modules and lays the groundwork for dynamic adjustment of drive strength. The adjustable drive strength feature demonstrates a capability of reducing overshoot and controlling dv / dt dynamically. Measurement of the gate driver was performed driving a power mosfet gate over temperature, exceeding 500 °C. High-speed and high-voltage room temperature evaluation is provided, demonstrating a system capable of high performance over temperature. The driver accomplishes better than 75 ns of rise and fall time driving the Cree CPM3-0900-0065B from room temperature to over 500 °C indicating that it will be ideal for integration into an all-SiC power module where driver, protection circuits, and power devices are fabricated in SiC.

A family of CMOS analog and mixed signal circuits in SiC for high temperature electronics

Abstract: This paper describes the simulation and test results of a family of analog and mixed signal circuits in silicon carbide CMOS technology at temperatures of 300°C and above. As SiC and wide bandgap devices in general grow in popularity for efficient and stable operation in high temperature and harsh environment applications, CMOS SiC integrated circuits can open up a new frontier of opportunity for miniaturization and system dependability. The building block circuits presented here can serve as the basis of rugged SiC system-on-chips for extreme environment applications.

Robust memristors based on layered two-dimensional materials

Abstract: Van der Waals heterostructure based on layered two-dimensional (2D) materials offers unprecedented opportunities to create materials with atomic precision by design. By combining superior properties of each component, such heterostructure also provides possible solutions to address various challenges of the electronic devices, especially those with vertical multilayered structures. Here, we report the realization of robust memristors for the first time based on van der Waals heterostructure of fully layered 2D materials (graphene/MoS2-xOx/graphene) and demonstrate a good thermal stability lacking in traditional memristors. Such devices have shown excellent switching performance with endurance up to 107 and a record-high operating temperature up to 340oC. By combining in situ high-resolution TEM and STEM studies, we have shown that the MoS2-xOx switching layer, together with the graphene electrodes and their atomically sharp interfaces, are responsible for the observed thermal stability at elevated temperatures. A well-defined conduction channel and a switching mechanism based on the migration of oxygen ions were also revealed. In addition, the fully layered 2D materials offer a good mechanical flexibility for flexible electronic applications, manifested by our experimental demonstration of a good endurance against over 1000 bending cycles. Our results showcase a general and encouraging pathway toward engineering desired device properties by using 2D van der Waals heterostructures.

Logic Gates and Computation from Assembled Nanowire Building Blocks

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Robust memristors based on layered two-dimensional materials

Abstract: Van der Waals heterostructures are formed by stacking layers of different two-dimensional materials and offer the possibility to design new materials with atomic-level precision. By combining the valuable properties of different 2D systems, such heterostructures could potentially be used to address existing challenges in the development of electronic devices, particularly those that require vertical multi-layered structures. Here we show that robust memristors with good thermal stability, which is lacking in traditional memristors, can be created from a van der Waals heterostructure composed of graphene/MoS2–xO x /graphene. The devices exhibit excellent switching performance with an endurance of up to 107 and a high operating temperature of up to 340 °C. With the help of in situ electron microscopy, we show that the thermal stability is due to the MoS2–xO x switching layer, as well as the graphene electrodes and the atomically sharp interface between the electrodes and the switching layer. We also show that the devices have a well-defined conduction channel and a switching mechanism that is based on the migration of oxygen ions. Finally, we demonstrate that the memristor devices can be fabricated on a polyimide substrate and exhibit good endurance against over 1,000 bending cycles, illustrating their potential for flexible electronic applications. Memristors that offer good thermal stability, which is lacking in traditional memristors, can be created from a van der Waals heterostructure composed of graphene/MoS2–xO x /graphene.

Wide Bandgap Technologies and Their Implications on Miniaturizing Power Electronic Systems

Abstract: The current state of wide bandgap device technology is reviewed and its impact on power electronic system miniaturization for a wide variety of voltage levels is described. A synopsis of recent complementary technological developments in passives, integrated driver, and protection circuitry and electronic packaging are described, followed by an outline of the applications that stand to be impacted. A glimpse into the future based on the current technological trends is offered.

Gate Oxide Reliability Issues of SiC MOSFETs Under Short-Circuit Operation

Abstract: Silicon-Carbide (SiC) MOSFETs, due to material properties, are designed with smaller thickness in the gate oxide and a higher electric field compared to Si MOSFETs. Consequently, the SiC MOSFETs have a worse reliability which causes higher leakage currents during instantaneous abnormal operating conditions. This paper investigates the reliability issues of the SiC MOSFET gate oxide under standard short-circuit test conditions. In this paper, 1200-V SiC MOSFETs are newly modeled, and also their short-circuit sustainability (tolerance) have been studied at different drain-source and gate-source voltages. A hardware tester circuit was designed and developed to test the devices under such extreme circuit conditions. Then, the gate reliability of SiC MOSFET devices have been compared to that of Si power devices of similar ratings. The results reveal a higher reduction in the instantaneous gate-source voltage of SiC MOSFETs compared to that of Si devices under the same operating conditions. The gate-voltage reduction phenomenon results from the higher leakage currents through the gate. Furthermore, it was found that the gate-source voltage reduction during the test depends on the gate structures. The gate voltage reduction of SiC MOSFETs with planar gate is higher than that of MOSFETs with shield planar gate. As the pulse duration increases in short-circuit tests, the leakage current in the gate-source of SiC devices increases. The results show that even though the SiC MOSFETs are very capable of processing long pulses and high power in the drain-source, the gate-source side is highly degraded by these pulses in the test. Moreover, whenever a small number of the short-circuit tests are applied, the gate structure of SiC MOSFETs becomes broken while the drain-source is still able to block the dc-link voltage. The paper concludes that the short-circuit reliability of the gate was found to be worse compared with commercial Si devices with similar rating.