Bio: Shilei Zhang is an academic researcher. The author has contributed to research in topics: Ultimate tensile strength & Materials science. The author has an hindex of 1, co-authored 6 publications receiving 1 citations.
TL;DR: In this article , a buck-boost type high step-down converter (BHSC) structure is proposed to realize a lower power circuit directly fed by MVDC, which seriously affects the reliability of the dc system.
Abstract: The medium-voltage dc (MVDC) system are intensely investigated by both industry and academy. However, how to realize a lower power circuit directly fed by MVDC is an important but easily neglected problem, which seriously affects the reliability of the dc system. The current high step-down circuits are mostly suitable for high-power applications, while the circuits for low-power applications are designed case by case. To address the obstacle, a generalized buck-boost type high step-down converter (BHSC) structure is proposed in this article. The submodules of BHSC are derived from basic dc–dc converter. As a result, the features of high modularity, simple structure, and low cost can be obtained, and each submodule operates independently without communication and synchronization to achieve voltage balance. Furthermore, a submodule strategy with Bang-Bang control, instead of hardware modification, is proposed to overcome the limitation of BHSC generality in medium-voltage (MV) and high-voltage (HV) applications, due to the operating current difference in different submodules of the cascaded structure. Therefore, BHSC can be easily extended to MV or HV by increasing the number of submodules. Finally, an experimental evaluation of a 1 kV/80 W prototype converter is presented, which can be applied as auxiliary power supply for high-power converter.
TL;DR: In this article , an improved method of parameter and tolerance concurrent design considering quality loss, which effectively saves the manufacturing cost while ensuring the product quality, was established, where the central composite bounded experimental design (CCI) was carried out, and then the response surface model was established from the data; Finally, the total cost model composed of the quality loss model and tolerance cost model is established, and the improved genetic algorithm (NSGA - II) was used to find the optimal parameter combination and tolerance at the same time.
Abstract: Quality and cost are the core problems in the manufacturing industry. Given the problems of many tests and high manufacturing costs caused by parameter design before tolerance design in the traditional Taguchi product optimization design, based on the idea of robust design and concurrent design, this paper establishes an improved method of parameter and tolerance concurrent design considering quality loss, which effectively saves the manufacturing cost while ensuring the product quality. Firstly, the central composite bounded experimental design (CCI) is carried out, and then the response surface model is established from the data; Then the total cost model composed of the quality loss model and tolerance cost model is established. Finally, the improved genetic algorithm (NSGA - II) is used to find the optimal parameter combination and tolerance at the same time. Through the example analysis of a compliant precision positioning platform, the results show that the parameter combination and tolerance obtained by concurrent design considering the parameters and tolerance of mass loss not only improve the robustness of products but also reduce the manufacturing cost.
TL;DR: In this paper , the Ni-WC coatings were treated with different preloading depths (0.20 mm, 0.25 mm, and 0.30 mm), and the microstructure and properties of the coatings are characterized by SEM, EDS, X-ray stress analysis, and micro-Vickers hardness testing.
Abstract: Cermet coatings are post-treated by a new surface microcrystallization technology, namely high-temperature-assisted ultrasonic deep rolling (HT + UDR). The process parameters of ultrasonic deep rolling significantly affect the microstructure and tribological properties of the Ni-WC coatings. In this paper, the samples were treated with different preloading depths (0.20 mm, 0.25 mm, and 0.30 mm), and the microstructure and properties of the coatings were characterized by SEM, EDS, X-ray stress analysis, and micro-Vickers hardness testing. An MMW-1A-type friction and wear tester was used for the dry friction and wear test at room temperature, respectively. Compared with the untreated sample, plastic rheology occurred on the surface of the coatings after HT + UDR, showing a phenomenon of “cutting peaks and filling valleys”. In the treated coatings, visible cracks were eliminated, and the inside of the coating was denser. The surface hard phase was increased as a “skeleton” and embedded with the soft phase, which played a role in strong and tough bonding. After HT + UDR + 0.25 mm treatment, the surface roughness increased by 68%, the microhardness of the surface layer reached a maximum of 726.3 HV0.1, and the residual tensile stress changed from 165.5 MPa to −337.9 MPa, which inhibited the germination and propagation of cracks. HT + UDR improved the wear resistance of the coating in many aspects. The coating after the 0.25 mm preloading depth treatment possessed the smallest friction coefficient and the lowest wear amount, which is 0.04 and 4.5 mg, respectively. The wear form was abrasive wear, and the comprehensive tribological performance is the best.
20 Mar 2022
TL;DR: In this article , a SiC MOSFET and Si devices hybrid four-level ANPC converter is proposed, which requires only two SiC mOSFets with relatively low blocking voltage in each phase.
Abstract: Four-level active-neutral-point-clamped (ANPC) converter has become a research hotspot in academic and industry terms for its features such as lower switching losses, lower voltage stresses on devices, and higher power density than two-level or three-level converters in high-power areas. Nowadays, SiC MOSFET & Si devices hybrid converters have been demonstrated as a high-performance and cost-effective solution. In this paper, a SiC MOSFET & Si devices hybrid four-level ANPC converter is proposed, which requires only two SiC MOSFETs with relatively low blocking voltage in each phase. In order to solve the voltage balancing problem in this circuit, a multi-step soft-switching modulation strategy is then proposed. Implementing the proposed modulation, only SiC devices undertake hard-switching at switching frequency and Si devices are all in soft-switching mode. As a result, the proposed converter has high efficiency but significantly lower cost compared to the all-SiC-MOSFET-based converter in the same topology. The proposed topology and modulation scheme are verified by simulation and experimental results.
TL;DR: In this paper , the authors proposed a power self-balanced high step-down medium voltage dc converter with expandable soft switching range, where each submodule is a soft-switching unit that uses an auxiliary inductor to achieve soft switching, which reduces the resonant current and facilitates the expansion of the number of modules, without redesigning the transformer.
Abstract: This article proposed a power self-balanced high step-down medium voltage dc converter with expandable soft-switching range. The proposed one features the input voltage self-balance of each submodule and the current self-balance of each mosfet, due to the submodules transmitting the same power through LC-coupled branches. The LC-coupled branch provides multiple direct ac power paths from medium voltage input to load, eliminating the losses caused by conventional multistage transmission. Each submodule of the proposed converter is a soft-switching unit that uses an auxiliary inductor to achieve soft switching, which reduces the resonant current and facilitates the expansion of the number of modules, without redesigning the transformer, instead of the conventional resonant converter that reduces the transformer magnetizing inductance to achieve soft-switching. Moreover, an auxiliary power supply scheme for the proposed converter is provided, which is used to solve the problem of difficult startup of the medium voltage dc converter, where the negative impedance characteristics of the series-connected auxiliary power supply are suppressed without the need for lossy voltage sharing resistors. A prototype with 1 kV dc input and 100 V/1 kW output is built to verify the feasibility of the proposed topology.