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Shuangchen Li
Researcher at University of California, Santa Barbara
Publications - 87
Citations - 4007
Shuangchen Li is an academic researcher from University of California, Santa Barbara. The author has contributed to research in topics: Speedup & Non-volatile memory. The author has an hindex of 24, co-authored 82 publications receiving 2755 citations. Previous affiliations of Shuangchen Li include Pennsylvania State University & Tsinghua University.
Papers
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Journal ArticleDOI
PRIME: a novel processing-in-memory architecture for neural network computation in ReRAM-based main memory
TL;DR: This work proposes a novel PIM architecture, called PRIME, to accelerate NN applications in ReRAM based main memory, and distinguishes itself from prior work on NN acceleration, with significant performance improvement and energy saving.
Proceedings ArticleDOI
Pinatubo: a processing-in-memory architecture for bulk bitwise operations in emerging non-volatile memories
TL;DR: This work proposes Pinatubo, a Processing In Non-volatile memory ArchiTecture for bUlk Bitwise Operations, which redesigns the read circuitry so that it can compute the bitwise logic of two or more memory rows very efficiently, and support one-step multi-row operations.
Proceedings ArticleDOI
DRISA: a DRAM-based Reconfigurable In-Situ Accelerator
TL;DR: DRISA, a DRAM-based Reconfigurable In-Situ Accelerator architecture, is proposed to provide both powerful computing capability and large memory capacity/bandwidth to address the memory wall problem in traditional von Neumann architecture.
Proceedings ArticleDOI
Architecture exploration for ambient energy harvesting nonvolatile processors
Kaisheng Ma,Yang Zheng,Shuangchen Li,Karthik Swaminathan,Xueqing Li,Yongpan Liu,Jack Sampson,Yuan Xie,Vijaykrishnan Narayanan +8 more
TL;DR: The simulation platform in this paper is calibrated using measured results from a fabricated nonvolatile processor and used to explore the design space for a nonVolatile processor with different architectures, different input power sources, and policies for maximizing forward progress.
Proceedings ArticleDOI
A 3us wake-up time nonvolatile processor based on ferroelectric flip-flops
Yiqun Wang,Yongpan Liu,Shuangchen Li,Daming Zhang,Bo Zhao,Mei-Fang Chiang,Yanxin Yan,Baiko Sai,Huazhong Yang +8 more
TL;DR: A fabricated nonvolatile processor based on ferroelectric flip-flops can operate continuously even under power failures occurring at 20 KHz and will provide a new level of support to chip-level fine-grained power management and energy harvesting applications.