Simpson J Petruzzello T J Leta

Bio: Simpson J Petruzzello T J Leta is an academic researcher from Philips. The author has contributed to research in topics: Transistor & Capacitance. The author has an hindex of 3, co-authored 4 publications receiving 43 citations.

SOI LDMOS structure with improved switching characteristics

Abstract: An improved method and structure for a transistor device with a lateral drift region and a conducting top field plate is presented. The method consists of decreasing the gate to drain capacitance by means of decreasing the portion of the field plate that is connected to the gate electrode, and hence the effective overlap of the gate with the drift region and drain. This results in decreased energy dissipation in switching the transistor, and more efficient operation. The rate of decrease of the gate to drain capacitance is even faster at higher drain voltages, inuring in significant energy efficiencies in high voltage applications.

Switch transistor energy waste reducing method and insulator device on transverse thin film silicon

Abstract: An improved method and structure for a transistor device with a lateral drift region and a conducting top field plate is presented. The method consists of decreasing the gate to drain capacitance by means of decreasing the portion of the field plate that is connected to the gate electrode, and hence the effective overlap of the gate with the drift region and drain. This results in decreased energy dissipation in switching the transistor, and more efficient operation. The rate of decrease of the gate to drain capacitance is even faster at higher drain voltages, inuring in significant energy efficiencies in high voltage applications.

SOI LDMOS transistor structure having improved switching characteristics

Abstract: An improved method and structure for a transistor device with a lateral drift region and a conducting top field plate is presented. The method consists of decreasing the gate to drain capacitance by means of decreasing the portion of the field plate that is connected to the gate electrode, and hence the effective overlap of the gate with the drift region and drain. This results in decreased energy dissipation in switching the transistor, and more efficient operation. The rate of decrease of the gate to drain capacitance is even faster at higher drain voltages, inuring in significant energy efficiencies in high voltage applications.

Soi ldmos transistor having a field plate and method of making the same

Abstract: A method and structure for a Silicon-on-Insulator transistor device such as Loi-LDMOS or Soi-LIGBT with a lateral drift region (32) and a conducting top field plate (44, 44a) is presented. The method consists of decreasing the gate to drain capacitance (301, 401) by means of decreasing the portion of the filed plate (44, 44a) that is connected to the gate electrode (36, 36a), and hence the effective overlap of the gate (36, 36a) with the drift region (32) and drain (34). This results in decreased energy dissipation in switching the transistor, and more efficient operation. The rate of decrease of the gate to drain capacitance (301, 401) is even faster at higher drain voltages, inuring in significant energy efficiencies in high voltage applications.

Wide bandgap transistor devices with field plates

Abstract: A transistor structure comprising an active semiconductor layer with metal source and drain contacts (20, 22) formed in electrical contact with the active layer. A gate contact (26) is formed between the source and drain contacts for modulating electric fields within the active layer. A spacer layer (24) is formed above the active layer and a conductive field plate (28) formed above the spacer layer, extending, a distance Lf from the edge of the gate contact toward the drain contact. The field plate is electrically connected to the gate contact.

Hydraulic control device for automatic transmission

Abstract: Provided is a hydraulic control device, in which a linear solenoid valve (SLC3) is constituted in a normal open type so that it outputs an application pressure for a clutch (C-3) even if it is turned OFF. On the basis of the application pressure of a clutch (C-2), on the other hand, a first clutch apply relay valve (121) outputs a first preparatory oil pressure at first to third forward speed stages, and outputs a second preparatory oil pressure at fourth to sixth forward speed stages. A second clutch apply relay valve (122) feeds hydraulic servos (41 and 42) at a normal time with the controlpressures of linear solenoid valves (SLC1 and SLC2), respectively, and the hydraulic servos (41 and 42) at an all-off fail time with the first preparatory oil pressure (PDC1) or the second preparatory oil pressure (PDC2), so that it applies the clutch (C-1) or the clutch (C-2) thereby to achieve a forward third speed stage or a forward fifth speed stage. In short, the hydraulic control device canbe made compact and can cut costs, although it can achieve a low-speed stage or a high-speed stage at the all off-fail time.

Wide bandgap transistors with multiple field plates

Abstract: A transistor comprising a plurality of active semiconductor layers on a substrate, with source and drain electrodes in contact with the semiconductor layers. A gate is formed between the source and drain electrodes and on the plurality of semiconductor layers. A plurality of field plates are arranged over the semiconductor layers, each of which extends from the edge of the gate toward the drain electrode, and each of which is isolated from said semiconductor layers and from the others of the field plates. The topmost of the field plates is electrically connected to the source electrode and the others of the field plates are electrically connected to the gate or the source electrode.

Wide bandgap hemts with source connected field plates

Abstract: A HEMT comprising a plurality of active semiconductor layers formed on a substrate. Source electrode, drain electrode, and gate are formed in electrical contact with the plurality of active layers. A spacer layer is formed on at least a portion of a surface of said plurality of active layers and covering the gate. A field plate is formed on the spacer layer and electrically connected to the source electrode, wherein the field plate reduces the peak operating electric field in the HEMT.

Semiconductor device structures and related processes

Abstract: Improved highly reliable power RFP structures and fabrication and operation processes. The structure includes plurality of localized dopant concentrated zones beneath the trenches of RFPs, either floating or extending and merging with the body layer of the MOSFET or connecting with the source layer through a region of vertical doped region. This local dopant zone decreases the minority carrier injection efficiency of the body diode of the device and alters the electric field distribution during the body diode reverse recovery.