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Author

Sin-Ting Chen

Other affiliations: National Taiwan University
Bio: Sin-Ting Chen is an academic researcher from National Sun Yat-sen University. The author has contributed to research in topics: Ground plane & Ground bounce. The author has an hindex of 9, co-authored 15 publications receiving 553 citations. Previous affiliations of Sin-Ting Chen include National Taiwan University.

Papers
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Journal ArticleDOI
TL;DR: In this article, a power/ground planes design for efficiently eliminating the ground bounce noise (GBN) in high-speed digital circuits is proposed by using low-period coplanar electromagnetic bandgap (LPC-EBG) structure.
Abstract: A power/ground planes design for efficiently eliminating the ground bounce noise (GBN) in high-speed digital circuits is proposed by using low-period coplanar electromagnetic bandgap (LPC-EBG) structure. Keeping solid for the ground plane and designing an LPC-EBG pattern on the power plane, the proposed structure omnidirectionally behaves highly efficiently in suppression of GBN (over 50 dB) within the broad-band frequency range (over 4 GHz). In addition, the proposed designs suppress radiated emission (or electromagnetic interference) caused by the GBN within the stopband. These extinctive behaviors of low radiation and broad-band suppression of the GBN is demonstrated numerically and experimentally. Good agreements are seen. The impact of the LPC-EBG power plane on the signal integrity for the signals referring to the power plane is investigated. Two possible solutions, differential signals and an embedded LPC-EBG power plane concept, are suggested and discussed to reduce the impact.

214 citations

Journal ArticleDOI
TL;DR: In this article, the effect of the partitioning and bridging of the power/ground planes on the radiation caused by the switching noise on the dc reference planes is investigated both theoretically and experimentally.
Abstract: Influence of the partitioning and bridging of the power/ground planes on the radiation caused by the switching noise on the dc reference planes is investigated both theoretically and experimentally. Based on the three-dimensional finite-difference time-domain modeling, the electromagnetic interference (EMI) performance of the partitioned power/ground planes is studied. Radiated emission at the 3-m distance from the tested boards is measured in a fully anechoic chamber. The measured and the numerical results agree generally well. The radiation behavior of four kinds of partitioned configuration of the power/ground planes is studied. It is found that completely isolating the noise source by the etched slits, or moats, significantly reduces the radiation level at the frequencies near resonance. However, bridges connecting two sides of the moat not only significantly degrade the ability of the EMI protection of the moat, but also excite a new low-frequency resonant mode. The effect of the geometrical parameters, such as the moat size, moat location, bridge width, and bridge position, on the radiation behavior of the printed circuit board is considered. The radiation mechanism of the EMI behavior of the partitioned dc reference planes is discussed.

95 citations

Journal ArticleDOI
TL;DR: In this article, a power/ground planes design for eliminating the ground bounce noise (GBN) in high-speed digital circuits is proposed by using low-period photonic bandgap (PBG) structure.
Abstract: A novel power/ground planes design for eliminating the ground bounce noise (GBN) in high-speed digital circuits is proposed by using low-period photonic bandgap (PBG) structure. Keeping solid for the ground plane and designing low-period PBG pattern on the power plane, the proposed structure omni-directionally behaves highly efficient suppression of GBN (over 50 dB) within broadband frequency range from 1 GHz to 4 GHz. Although the power plane has low-period perforation, the proposed structure still performs with relatively low radiation within the stopband compared with the solid power/ground planes. The low radiation and high suppression of the GBN for the proposed structure are checked both experimentally and numerically. Good consistency is seen.

93 citations

Journal ArticleDOI
TL;DR: In this paper, a photonic crystal power/ground layer (PCPL) is proposed to suppress the power and ground bounce noise (P/GBN) or simultaneously switching noise (SSN) in high-speed digital circuits.
Abstract: A novel photonic crystal power/ground layer (PCPL) is proposed to efficiently suppress the power/ground bounce noise (P/GBN) or simultaneously switching noise (SSN) in high-speed digital circuits. The PCPL is designed by periodically embedding high dielectric-constant rods into the substrate between the power and ground planes with a small area filling ratio less than 10%. The PCPL can efficiently eliminate the SSN (over 60 dB) with broad stopband bandwidth (totally over 4 GHz) below the 10-GHz range, and in the time domain, the P/GBN can be significantly reduced over 90%. The PCPL not only performs good power integrity, but also keeps good signal quality with significant improvement on eye patterns for high-speed signals with via transitions. In addition, the proposed designs perform low radiation (or electromagnetic interference) caused by the SSN within the stopbands. These extinctive behaviors both in signal integrity and electromagnetic compatibility are demonstrated numerically and experimentally. Good agreements are seen. The bandgap maps to help design the PCPL structure are also demonstrated based on the two-dimensional finite-difference time-domain method

43 citations

Journal ArticleDOI
TL;DR: In this article, an efficient numerical approach based on the 2D finite-difference time-domain (FDTD) method is proposed to model the power/ground plane noise or simultaneously switching noise (SSN), including the interconnect effect between the package and the print circuit board (PCB).
Abstract: An efficient numerical approach based on the 2-D finite-difference time-domain (FDTD) method is proposed to model the power/ground plane noise or simultaneously switching noise (SSN), including the interconnect effect between the package and the print circuit board (PCB). The space between the power and ground planes on the package and PCB are meshed with 2-D cells. The equivalent R-L-C circuits of the via and the solder balls connecting the package and PCB can be incorporated into a 2-D Yee cell based on a novel integral formulation in the time domain. An efficient recursive updating algorithm is proposed to fit the lumped networks into the Yee equations. A test sample of a ball grid array (BGA) package mounted on a PCB was fabricated. The power/ground noise coupling behavior was measured and compared with the simulation. The proposed method significantly reduces the computing time compared with other full-wave numerical approaches.

34 citations


Cited by
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Patent
TL;DR: A printed circuit board includes chip regions on which semiconductor chips are mounted, and a scribe region surrounding each of the chip regions as mentioned in this paper, which includes first vent holes that are configured to receive a flow of molding resin.

229 citations

Journal ArticleDOI
TL;DR: In this article, a power/ground planes design for efficiently eliminating the ground bounce noise (GBN) in high-speed digital circuits is proposed by using low-period coplanar electromagnetic bandgap (LPC-EBG) structure.
Abstract: A power/ground planes design for efficiently eliminating the ground bounce noise (GBN) in high-speed digital circuits is proposed by using low-period coplanar electromagnetic bandgap (LPC-EBG) structure. Keeping solid for the ground plane and designing an LPC-EBG pattern on the power plane, the proposed structure omnidirectionally behaves highly efficiently in suppression of GBN (over 50 dB) within the broad-band frequency range (over 4 GHz). In addition, the proposed designs suppress radiated emission (or electromagnetic interference) caused by the GBN within the stopband. These extinctive behaviors of low radiation and broad-band suppression of the GBN is demonstrated numerically and experimentally. Good agreements are seen. The impact of the LPC-EBG power plane on the signal integrity for the signals referring to the power plane is investigated. Two possible solutions, differential signals and an embedded LPC-EBG power plane concept, are suggested and discussed to reduce the impact.

214 citations

Journal ArticleDOI
TL;DR: In this article, the authors reviewed possible solutions based on decoupling or isolation for suppressing power distribution network (PDN) noise on package or printed circuit board (PCB) levels.
Abstract: Mitigating power distribution network (PDN) noise is one of the main efforts for power integrity (PI) design in high-speed or mixed-signal circuits. Possible solutions, which are based on decoupling or isolation concept, for suppressing PDN noise on package or printed circuit board (PCB) levels are reviewed in this paper. Keeping the PDN impedance very low in a wide frequency range, except at dc, by employing a shunt capacitors, which can be in-chip, package, or PCB levels, is the first priority way for PI design. The decoupling techniques including the planes structure, surface-mounted technology decoupling capacitors, and embedded capacitors will be discussed. The isolation approach that keeps part of the PDN at high impedance is another way to reduce the PDN noise propagation. Besides the typical isolation approaches such as the etched slots and filter, the new isolation concept using electromagnetic bandgap structures will also be discussed.

200 citations

Journal ArticleDOI
TL;DR: In this article, a novel L-bridged electromagnetic bandgap (EBG) power/ground planes is proposed with super-wideband suppression of the ground bounce noise (GBN) from 600Mz to 4.6GHz.
Abstract: A novel L-bridged electromagnetic bandgap (EBG) power/ground planes is proposed with super-wideband suppression of the ground bounce noise (GBN) from 600Mz to 4.6GHz. The L-shaped bridge design on the EBG power plane not only broadens the stopband bandwidth, but also can increase the mutual coupling between the adjacent EBG cells by significantly decreasing the gap between the cells. It is found the small gap design can prevent from the severe degradation of the signal quality for the high-speed signal referring to the perforated EBG power plane. The excellent GBN suppression performance with keeping reasonably good signal integrity for the proposed structure is validated both experimentally and numerically. Good agreement is seen.

163 citations

Journal ArticleDOI
TL;DR: In this article, perfect magnetic conductor (PMC)-based packaging technique was used to improve the isolation performance among various microwave circuit components such as high-gain amplifier chains, and two Ka-band amplifier chains were tested with this new packaging technique.
Abstract: In this paper, perfect magnetic conductor (PMC)-based packaging technique was used to improve the isolation performance among various microwave circuit components such as high-gain amplifier chains. In this approach, a periodic structure (such as metal pin rows) together with the ground plane of the substrate created a stopband for unwanted parallel plate or cavity modes as well as substrate modes, and thereby suppressed the problems of circuit resonances and related package phenomena. This paper describes two Ka-band amplifier chains that were tested with this new packaging technique. Firstly, a single amplifier chain was tested for maximum stable gain operation, and it was found that the stable gain of was achieved, whereas traditional metal wall package with RF absorber offered stable gain of 40 dB, thus showing significant isolation improvement. Secondly, two high-gain amplifier chains were placed side by side and their mutual isolation was tested. With the proposed gap waveguide packaging, a minimum isolation of 78 dB was achieved, whereas a complete metal shield provided a minimum isolation of only 64 dB over the band of interest.

126 citations