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Srinivas Devadas

Researcher at Massachusetts Institute of Technology

Publications -  498
Citations -  35003

Srinivas Devadas is an academic researcher from Massachusetts Institute of Technology. The author has contributed to research in topics: Sequential logic & Combinational logic. The author has an hindex of 88, co-authored 480 publications receiving 31897 citations. Previous affiliations of Srinivas Devadas include University of California, Berkeley & Cornell University.

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Benchmarking and Workload Analysis of Robot Dynamics Algorithms

TL;DR: This work surveys current state-of-the-art software implementations of the key rigid body dynamics algorithms (RBDL, Pinocchio, RigidBodyDynamics, and RobCoGen), establishes a methodology for benchmarking these algorithms, and characterize their performance through real measurements taken on a modern hardware platform.
Proceedings ArticleDOI

Towards an interpreter for efficient encrypted computation

TL;DR: This paper describes how path levelization reduces control flow ambiguity and improves encrypted computation efficiency and builds support for hierarchical programs made up of phases, where each phase corresponds to a fixed point computation that can be used to further improve the efficiency of encrypted computation.
Journal ArticleDOI

Toward a Coherent Multicore Memory Model

TL;DR: With exascale multicores, the question of how to efficiently support a shared memory model is of paramount importance as ever-growing core counts place higher demands on memory subsystems, and increasing on-chip distances mean that interconnect delays exert a significant effect on memory access latencies.

Secure Hardware Processors using Silicon Physical One-Way Functions

TL;DR: POWFs were introduced in [1], where they are implemented by shining a mobile laser beam through a nonhomogenous medium and observing the resulting speckle pattern and were used to make unclonable ID cards.

Dynamic Cache Partitioning for CMP/SMT Systems

TL;DR: This paper proposes a technique for dynamic cache partitioning amongst simultaneously executing processes/threads, and presents a general partitioning scheme that can be applied to set-associative caches at any partition granularity.