S
Stefan Kubicek
Researcher at Katholieke Universiteit Leuven
Publications - 140
Citations - 3064
Stefan Kubicek is an academic researcher from Katholieke Universiteit Leuven. The author has contributed to research in topics: CMOS & Metal gate. The author has an hindex of 25, co-authored 138 publications receiving 2882 citations. Previous affiliations of Stefan Kubicek include TSMC.
Papers
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Proceedings ArticleDOI
10×10nm 2 Hf/HfO x crossbar resistive RAM with excellent performance, reliability and low-energy operation
Bogdan Govoreanu,Gouri Sankar Kar,Y. Y. Chen,Vasile Paraschiv,Stefan Kubicek,Andrea Fantini,Iuliana Radu,Ludovic Goux,Sergiu Clima,Robin Degraeve,N. Jossart,O. Richard,T. Vandeweyer,K. Seo,Paul Hendrickx,Geoffrey Pourtois,Hugo Bender,L. Altimime,Dirk Wouters,Jorge A. Kittl,Malgorzata Jurczak +20 more
TL;DR: In this paper, the smallest HfO 2 -based resistive RAM (RRAM) cell was reported, featuring a novel Hf/HfO x resistive element stack, with an area of less than 10×10 nm2, fast ns-range on/off switching times at lowvoltages and with a switching energy per bit of <0.1pJ.
Journal ArticleDOI
Impact of MOSFET gate oxide breakdown on digital circuit operation and reliability
Ben Kaczer,Robin Degraeve,Guido Groeseneken,Mahmoud Rasras,Stefan Kubicek,E. Vandamme,Gonçal Badenes +6 more
TL;DR: In this paper, the influence of FET gate oxide breakdown on the performance of a ring oscillator circuit was studied using statistical tools, emission microscopy, and circuit analysis. But the authors did not consider the effects of the breakdown on circuit performance.
Proceedings ArticleDOI
Modulation of the Ni FUSI workfunction by Yb doping: from midgap to n-type band-edge
Hong Yu Yu,J.D. Chen,Ming-Fu Li,S.J. Lee,Dim-Lee Kwong,M.J.H. van Dal,Jorge A. Kittl,A. Lauwers,E. Augendre,Stefan Kubicek,Chao Zhao,Hugo Bender,Bert Brijs,Luc Geenen,A. Benedetti,Philippe Absil,Malgorzata Jurczak,Serge Biesemans +17 more
TL;DR: In this article, the authors showed that adding Yb to Ni FUSI allows tuning the work function from midgap to n-type band-edge on thin SiON, maintaining same EOT.
Journal ArticleDOI
Planar Bulk MOSFET s Versus FinFETs: An Analog/RF Perspective
V. Subramanian,Bertrand Parvais,Jonathan Borremans,Abdelkarim Mercha,D. Linten,P. Wambacq,Josine Loo,Morin Dehan,C. Gustin,Nadine Collaert,Stefan Kubicek,R.J.P. Lander,J. Hooker,F. N. Cubaynes,Stéphane Donnay,Malgorzata Jurczak,Guido Groeseneken,Willy Sansen,Stefaan Decoutere +18 more
TL;DR: In this paper, the authors compared the performance of FinFETs and planar bulk MOSFET and found that the latter has better voltage gain without degradation of noise or linearity.
Proceedings ArticleDOI
Vertically stacked gate-all-around Si nanowire CMOS transistors with dual work function metal gates
Hans Mertens,Romain Ritzenthaler,Adrian Chasin,Tom Schram,Eddy Kunnen,Andriy Hikavyy,Lars-Ake Ragnarsson,Harold Dekkers,T. Hopf,Kurt Wostyn,Katia Devriendt,S. A. Chew,Min-Soo Kim,Y. Kikuchi,Erik Rosseel,G. Mannaert,Stefan Kubicek,Steven Demuynck,A. Dangol,N. Bosman,J. Geypen,Patrick Carolan,Hugo Bender,Kathy Barla,Naoto Horiguchi,Dan Mocuta +25 more
TL;DR: In this paper, the authors report on the CMOS integration of vertically stacked gate-all-around (GAA) silicon nanowire MOSFETs, with matched threshold voltages (V t, sat ∼ 0.35 V) for N- and P-type devices.