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Stéphane Xavier

Bio: Stéphane Xavier is an academic researcher from École Polytechnique. The author has contributed to research in topics: Carbon nanotube & Graphene. The author has an hindex of 20, co-authored 49 publications receiving 2937 citations.


Papers
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Journal ArticleDOI
TL;DR: It is demonstrated that voltage-controlled domain configurations in ferroelectric tunnel barriers yield memristive behaviour with resistance variations exceeding two orders of magnitude and a 10 ns operation speed.
Abstract: Memristors are devices whose dynamic properties are of interest because they can mimic the operation of biological synapses. The demonstration that ferroelectric domains in tunnel junctions behave like memristors suggests new approaches for designing neuromorphic circuits.

906 citations

Journal ArticleDOI
TL;DR: Non-volatile memories with OFF/ON ratios as high as 100 and write powers as low as ∼1 × 10(4) A cm(-2) at room temperature are reported by storing data in the electric polarization direction of a ferroelectric tunnel barrier.
Abstract: Ferroic-order parameters are useful as state variables in non-volatile information storage media because they show a hysteretic dependence on their electric or magnetic field. Coupling ferroics with quantum-mechanical tunnelling allows a simple and fast readout of the stored information through the influence of ferroic orders on the tunnel current. For example, data in magnetic random-access memories are stored in the relative alignment of two ferromagnetic electrodes separated by a non-magnetic tunnel barrier, and data readout is accomplished by a tunnel current measurement. However, such devices based on tunnel magnetoresistance typically exhibit OFF/ON ratios of less than 4, and require high powers for write operations (>1 × 10(6) A cm(-2)). Here, we report non-volatile memories with OFF/ON ratios as high as 100 and write powers as low as ∼1 × 10(4) A cm(-2) at room temperature by storing data in the electric polarization direction of a ferroelectric tunnel barrier. The junctions show large, stable, reproducible and reliable tunnel electroresistance, with resistance switching occurring at the coercive voltage of ferroelectric switching. These ferroelectric devices emerge as an alternative to other resistive memories, and have the advantage of not being based on voltage-induced migration of matter at the nanoscale, but on a purely electronic mechanism.

514 citations

Journal ArticleDOI
TL;DR: This work reports on synapses based on ferroelectric tunnel junctions and shows that STDP can be harnessed from inhomogeneous polarization switching and demonstrates that conductance variations can be modelled by the nucleation-dominated reversal of domains.
Abstract: In the brain, learning is achieved through the ability of synapses to reconfigure the strength by which they connect neurons (synaptic plasticity). In promising solid-state synapses called memristors, conductance can be finely tuned by voltage pulses and set to evolve according to a biological learning rule called spike-timing-dependent plasticity (STDP). Future neuromorphic architectures will comprise billions of such nanosynapses, which require a clear understanding of the physical mechanisms responsible for plasticity. Here we report on synapses based on ferroelectric tunnel junctions and show that STDP can be harnessed from inhomogeneous polarization switching. Through combined scanning probe imaging, electrical transport and atomic-scale molecular dynamics, we demonstrate that conductance variations can be modelled by the nucleation-dominated reversal of domains. Based on this physical model, our simulations show that arrays of ferroelectric nanosynapses can autonomously learn to recognize patterns in a predictable way, opening the path towards unsupervised learning in spiking neural networks.

410 citations

Journal ArticleDOI
TL;DR: A demonstration of the ability to transmit spin currents over distances of more than one hundred micrometres with an efficiency of up to 75% in graphene grown epitaxially on silicon carbide improves the prospects of graphene-based spintronic devices.
Abstract: A demonstration of the ability to transmit spin currents over distances of more than one hundred micrometres with an efficiency of up to 75% in graphene grown epitaxially on silicon carbide improves the prospects of graphene-based spintronic devices

376 citations

Journal ArticleDOI
TL;DR: This work investigates the underlying antifogging mechanism in model materials designed to mimic natural systems, and explains the importance of the texture's feature size and shape.
Abstract: Nanometre-scale features with special shapes impart a broad spectrum of unique properties to the surface of insects. These properties are essential for the animal's survival, and include the low light reflectance of moth eyes, the oil repellency of springtail carapaces and the ultra-adhesive nature of palmtree bugs. Antireflective mosquito eyes and cicada wings are also known to exhibit some antifogging and self-cleaning properties. In all cases, the combination of small feature size and optimal shape provides exceptional surface properties. In this work, we investigate the underlying antifogging mechanism in model materials designed to mimic natural systems, and explain the importance of the texture's feature size and shape. While exposure to fog strongly compromises the water-repellency of hydrophobic structures, this failure can be minimized by scaling the texture down to nanosize. This undesired effect even becomes non-measurable if the hydrophobic surface consists of nanocones, which generate antifogging efficiency close to unity and water departure of droplets smaller than 2 μm.

269 citations


Cited by
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Journal ArticleDOI
TL;DR: The performance requirements for computing with memristive devices are examined and how the outstanding challenges could be met are examined.
Abstract: Memristive devices are electrical resistance switches that can retain a state of internal resistance based on the history of applied voltage and current. These devices can store and process information, and offer several key performance characteristics that exceed conventional integrated circuit technology. An important class of memristive devices are two-terminal resistance switches based on ionic motion, which are built from a simple conductor/insulator/conductor thin-film stack. These devices were originally conceived in the late 1960s and recent progress has led to fast, low-energy, high-endurance devices that can be scaled down to less than 10 nm and stacked in three dimensions. However, the underlying device mechanisms remain unclear, which is a significant barrier to their widespread application. Here, we review recent progress in the development and understanding of memristive devices. We also examine the performance requirements for computing with memristive devices and detail how the outstanding challenges could be met.

3,037 citations

Journal ArticleDOI
TL;DR: An overview of the key aspects of graphene and related materials, ranging from fundamental research challenges to a variety of applications in a large number of sectors, highlighting the steps necessary to take GRMs from a state of raw potential to a point where they might revolutionize multiple industries are provided.
Abstract: We present the science and technology roadmap for graphene, related two-dimensional crystals, and hybrid systems, targeting an evolution in technology, that might lead to impacts and benefits reaching into most areas of society. This roadmap was developed within the framework of the European Graphene Flagship and outlines the main targets and research areas as best understood at the start of this ambitious project. We provide an overview of the key aspects of graphene and related materials (GRMs), ranging from fundamental research challenges to a variety of applications in a large number of sectors, highlighting the steps necessary to take GRMs from a state of raw potential to a point where they might revolutionize multiple industries. We also define an extensive list of acronyms in an effort to standardize the nomenclature in this emerging field.

2,560 citations

Journal ArticleDOI
07 May 2015-Nature
TL;DR: The experimental implementation of transistor-free metal-oxide memristor crossbars, with device variability sufficiently low to allow operation of integrated neural networks, in a simple network: a single-layer perceptron (an algorithm for linear classification).
Abstract: Despite much progress in semiconductor integrated circuit technology, the extreme complexity of the human cerebral cortex, with its approximately 10(14) synapses, makes the hardware implementation of neuromorphic networks with a comparable number of devices exceptionally challenging. To provide comparable complexity while operating much faster and with manageable power dissipation, networks based on circuits combining complementary metal-oxide-semiconductors (CMOSs) and adjustable two-terminal resistive devices (memristors) have been developed. In such circuits, the usual CMOS stack is augmented with one or several crossbar layers, with memristors at each crosspoint. There have recently been notable improvements in the fabrication of such memristive crossbars and their integration with CMOS circuits, including first demonstrations of their vertical integration. Separately, discrete memristors have been used as artificial synapses in neuromorphic networks. Very recently, such experiments have been extended to crossbar arrays of phase-change memristive devices. The adjustment of such devices, however, requires an additional transistor at each crosspoint, and hence these devices are much harder to scale than metal-oxide memristors, whose nonlinear current-voltage curves enable transistor-free operation. Here we report the experimental implementation of transistor-free metal-oxide memristor crossbars, with device variability sufficiently low to allow operation of integrated neural networks, in a simple network: a single-layer perceptron (an algorithm for linear classification). The network can be taught in situ using a coarse-grain variety of the delta rule algorithm to perform the perfect classification of 3 × 3-pixel black/white images into three classes (representing letters). This demonstration is an important step towards much larger and more complex memristive neuromorphic networks.

2,222 citations

Journal ArticleDOI
TL;DR: The experimental and theoretical state-of-art concerning spin injection and transport, defect-induced magnetic moments, spin-orbit coupling and spin relaxation in graphene are reviewed.
Abstract: The isolation of graphene has triggered an avalanche of studies into the spin-dependent physical properties of this material, as well as graphene-based spintronic devices Here we review the experimental and theoretical state-of-art concerning spin injection and transport, defect-induced magnetic moments, spin-orbit coupling and spin relaxation in graphene Future research in graphene spintronics will need to address the development of applications such as spin transistors and spin logic devices, as well as exotic physical properties including topological states and proximity-induced phenomena in graphene and other 2D materials

1,329 citations

Journal ArticleDOI
01 Jun 2018
TL;DR: This Review Article examines the development of in-memory computing using resistive switching devices, where the two-terminal structure of the devices, theirresistive switching properties, and direct data processing in the memory can enable area- and energy-efficient computation.
Abstract: Modern computers are based on the von Neumann architecture in which computation and storage are physically separated: data are fetched from the memory unit, shuttled to the processing unit (where computation takes place) and then shuttled back to the memory unit to be stored. The rate at which data can be transferred between the processing unit and the memory unit represents a fundamental limitation of modern computers, known as the memory wall. In-memory computing is an approach that attempts to address this issue by designing systems that compute within the memory, thus eliminating the energy-intensive and time-consuming data movement that plagues current designs. Here we review the development of in-memory computing using resistive switching devices, where the two-terminal structure of the devices, their resistive switching properties, and direct data processing in the memory can enable area- and energy-efficient computation. We examine the different digital, analogue, and stochastic computing schemes that have been proposed, and explore the microscopic physical mechanisms involved. Finally, we discuss the challenges in-memory computing faces, including the required scaling characteristics, in delivering next-generation computing. This Review Article examines the development of in-memory computing using resistive switching devices.

1,193 citations