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Author

Subramanian Tamilmani

Bio: Subramanian Tamilmani is an academic researcher. The author has contributed to research in topics: Porous silicon & Microelectromechanical systems. The author has an hindex of 4, co-authored 7 publications receiving 157 citations.

Papers
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Patent
26 Feb 2013
TL;DR: In this paper, the split and separation of a layer of desired thickness of crystalline semiconductor material containing optical, photovoltaic, electronic, microelectro-mechanical system (MEMS), or optoelectronic devices, from a thicker donor wafer using laser irradiation is described.
Abstract: Methods and systems are provided for the split and separation of a layer of desired thickness of crystalline semiconductor material containing optical, photovoltaic, electronic, micro-electro-mechanical system (MEMS), or optoelectronic devices, from a thicker donor wafer using laser irradiation.

102 citations

Patent
03 Nov 2011
TL;DR: In this paper, high-productivity controlled fabrication of uniform porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or mult-porosity layers) is discussed.
Abstract: This disclosure enables high-productivity controlled fabrication of uniform porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.

16 citations

Patent
13 Aug 2011
TL;DR: In this article, a semiconductor wafer is repeatedly used as a template and carrier for fabricating high efficiency capable thin semiconductor solar cells substrates, and mechanisms that enable repeated use of these templates at consistent quality and with high yield are disclosed.
Abstract: Mechanisms are disclosed by which a semiconductor wafer, silicon in some embodiments, is repeatedly used to serve as a template and carrier for fabricating high efficiency capable thin semiconductor solar cells substrates. Mechanisms that enable such repeated use of these templates at consistent quality and with high yield are disclosed.

16 citations

Patent
15 Jan 2010
TL;DR: In this article, the authors present an object of this disclosure to provide high productivity, low cost of ownership manufacturing equipment for the high volume production of photovoltaic (PV) solar cell device architecture.
Abstract: It is an object of this disclosure to provide high productivity, low cost-of-ownership manufacturing equipment for the high volume production of photovoltaic (PV) solar cell device architecture. It is a further object of this disclosure to reduce material processing steps and material cost compared to existing technologies by using gas-phase source silicon. The present disclosure teaches the fabrication of a sacrificial substrate base layer that is compatible with a gas-phase substrate growth process. Porous silicon is used as the sacrificial layer in the present disclosure. Further, the present disclosure provides equipment to produce a sacrificial porous silicon PV cell-substrate base layer.

14 citations

Patent
24 Sep 2011
TL;DR: In this paper, a disclosure enables high-productivity fabrication of porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multiporosity layers).
Abstract: This disclosure enables high-productivity fabrication of porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.

4 citations


Cited by
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Patent
05 Jan 2016
TL;DR: In this article, the laser beam is applied to the ingot plural times with the focal point of a laser beam set at the modified layer previously formed, thereby separating the cracks from the modified layers.
Abstract: A wafer producing method for producing a hexagonal single crystal wafer from a hexagonal single crystal ingot includes a separation start point forming step of setting the focal point of a laser beam inside the ingot at a predetermined depth from the upper surface of the ingot, which depth corresponds to the thickness of the wafer to be produced, and next applying the laser beam to the upper surface of the ingot while relatively moving the focal point and the ingot to thereby form a modified layer parallel to the upper surface of the ingot and cracks extending from the modified layer, thus forming a separation start point. In the separation start point forming step, the laser beam is applied to the ingot plural times with the focal point of the laser beam set at the modified layer previously formed, thereby separating the cracks from the modified layer.

48 citations

Patent
27 May 2011
TL;DR: In this article, laser processing schemes for producing various types of hetero-junction and homojunction solar cells are disclosed for producing different types of solar cells, such as base and emitter contact opening, selective doping, and metal ablation.
Abstract: Laser processing schemes are disclosed for producing various types of hetero-junction and homo-junction solar cells. The methods include base and emitter contact opening, selective doping, and metal ablation. Also, laser processing schemes are disclosed that are suitable for selective amorphous silicon ablation and selective doping for hetero-junction solar cells. These laser processing techniques may be applied to semiconductor substrates, including crystalline silicon substrates, and further including crystalline silicon substrates which are manufactured either through wire saw wafering methods or via epitaxial deposition processes, that are either planar or textured/three-dimensional. These techniques are highly suited to thin crystalline semiconductor, including thin crystalline silicon films.

45 citations

Patent
31 May 2013
TL;DR: In this article, a substrate treating apparatus is provided, which includes a loading/unloading unit, a process unit in which a substrate-treating process is performed, a loadlock unit disposed between the loading and unloading unit and the process unit, and a carrying member transferring a substrate between the process and the load-lock unit.
Abstract: A substrate treating apparatus is provided. The substrate treating apparatus includes a loading/unloading unit, a process unit in which a substrate treating process is performed, a loadlock unit disposed between the loading/unloading unit and the process unit, and a carrying member transferring a substrate between the process unit and the loadlock unit. Herein, the carrying member is provided in the process unit and the loadlock unit, and the loading/unloading unit, the loadlock unit, and the process unit are sequentially disposed.

43 citations

Patent
24 Apr 2014
TL;DR: A wafer processing method including the steps of storing information on the intervals and positions of metal patterns formed on part of division lines on a wafer into a storage unit of a cutting apparatus, detecting the division lines, forming a cut groove along each division line by using a cutting blade, imaging an area including the cut groove at any position where the metal patterns are not formed, by using an imaging unit included in the cutting apparatus.
Abstract: A wafer processing method including the steps of storing information on the intervals and positions of metal patterns formed on part of division lines on a wafer into a storage unit of a cutting apparatus, detecting the division lines, forming a cut groove along each division line by using a cutting blade, imaging an area including the cut groove at any position where the metal patterns are not formed, by using an imaging unit included in the cutting apparatus, according to the information on the intervals and positions of the metal patterns previously stored, during the step of forming the cut grooves, and measuring the positional relation between the position of the cut groove and a preset cutting position. Accordingly, kerf check can be performed without being influenced by burrs produced from the metal patterns in cutting the wafer, so that the wafer can be cut with high accuracy.

31 citations

Patent
Thomas Pass1
22 Sep 2014
TL;DR: In this paper, a dielectric spacer is formed on a surface of the solar cell structure and a metal foil is placed on the metal layer, then a laser beam is used to weld the metal foil to the metal layers.
Abstract: A solar cell structure includes P-type and N-type doped regions. A dielectric spacer is formed on a surface of the solar cell structure. A metal layer is formed on the dielectric spacer and on the surface of the solar cell structure that is exposed by the dielectric spacer. A metal foil is placed on the metal layer. A laser beam is used to weld the metal foil to the metal layer. A laser beam is also used to pattern the metal foil. The laser beam ablates portions of the metal foil and the metal layer that are over the dielectric spacer. The laser ablation of the metal foil cuts the metal foil into separate P-type and N-type metal fingers.

28 citations