Sudhakar Singamala

Bio: Sudhakar Singamala is an academic researcher from ams AG. The author has contributed to research in topics: Voltage & Voltage reference. The author has an hindex of 3, co-authored 6 publications receiving 36 citations.

Cell balancing module, voltage balancer device, and method for voltage balancing, particularly for voltage balancing of a stack of batteries

Abstract: The invention relates to a cell balancing module, particularly for voltage balancing of a stack of batteries. The cell balancing module comprises an interface (SPI, VrefH, VrefL) to input a coded reference voltage (Vref) and input nodes (In1, ..., InN) for connecting a stack of energy storage cells (BAT1, ..., BATn). A switching unit (SW) is connected to each of the input nodes (In1, ..., InN) and a local balancing unit (loc) coupled to the switching unit (SW) and the interface (SPI, VrefH, VrefL). The local balancing unit (loc) is designed to compare the coded reference voltage (Vref) with cell voltages (VBAT1, ..., VBATn) of the stack of energy storage cells (BAT1, ..., BATn) to be connected and to charge balance the stack of energy storage cells (BAT1, ..., BATn) to be connected depending on the comparison of coded reference voltage (Vref) and cell voltages (VBAT1, ..., VBATn). The invention also relates to a voltage balancing device and method for cell balancing, particularly for voltage balancing of a stack of batteries.

A Digitally Calibrated Bandgap Reference With 0.06% Error for Low-Side Current Sensing Application

Abstract: Accurate current and voltage measurements are essential for estimating the state of charge of an automotive battery Typically, circuits are designed to measure low-side current of lead-acid battery These circuits, however, require a precision reference voltage across a temperature range In this paper, a design of an on-chip precision bandgap reference with a digitally calibrated technique is described The bandgap is trimmed for temperature and magnitude and is calibrated digitally Experimental results show that a maximum of 006% variation in the bandgap output for a temperature range of −40 °C–100 °C at a power supply voltage of 33 V is achieved The integrated circuit is fabricated in 035- $\mu \text{m}$ standard CMOS technology and occupies an area of 023 mm2

Analog-to-digital converter, measurement arrangement and method for analog-to-digital conversion

Abstract: An analog-to-digital converter (10) comprises a first and a second sampling capacitor (24, 25), a first integrator (26), a first and a second input switch (31, 32) coupling a first input terminal (11) and a common mode terminal (39) to a first electrode of the first sampling capacitor (24), a third and a fourth input switch (33, 34) coupling a second input terminal (12) and the common mode terminal (39) to a first electrode of the second sampling capacitor (25), a fifth and a sixth input switch (35, 36) coupling a second electrode of the first sampling capacitor (24) to an amplifier common mode terminal (40) and the first integrator input (27), and a seventh and an eighth input switch (37, 38) coupling a second electrode of the second sampling capacitor (25) to the amplifier common mode terminal (40) and the second integrator input (28).

Design of AFE and PWM Drive for Lithium-Ion Battery Management System for HEV/EV System

Abstract: This paper describes Analog-front-end (AFE) for lithium-ion battery management system. It includes the design of the differential clocked comparator which compares the cell voltage and the external reference voltage in the cell voltage domain to find if the cell voltage is within the safe operating range. This also includes PWM drive for the external fly-back dc-dc converter, the charge shuttling switches and control logic for active cell balancing of Lithium-ion battery cells in 0.35um high voltage (HV) CMOS technology. PWM drive circuit generates programmable frequency and programmable duty cycle to drive external low-side FET in the primary of the fly-back dc-dc converter. Secondary of the fly-back converter is connected to on-chip charge shuttling switches. Based on the differential comparators decision for the set target cell balance voltage, the digital finite state machine (FSM) generates control signal to charge individual cells in the battery sequentially. These circuits are part of lithium-ion battery cell balancer IC. The IC is designed to support cell voltage monitoring and cell balancing of a lithium-ion battery of seven cells.

Battery energy storage system and control system and applications thereof

Abstract: An electrical energy storage unit and control system, and applications thereof. In an embodiment, the electrical energy storage unit (which may also be referred to as a battery energy storage system (“BESS”)) includes a battery system controller and battery packs. Each battery pack has battery cells, a battery pack controller that monitors the cells, a battery pack cell balancer that adjusts the amount of energy stored in the cells, and a battery pack charger. The battery pack controller operates the battery pack cell balancer and the battery pack charger to control the state-of-charge of the cells. In an embodiment, the cells are lithium ion battery cells.

Electrical energy storage unit and control system and applications thereof

Abstract: An electrical energy storage unit and control system, and applications thereof. In an embodiment, the electrical energy storage unit includes a battery system controller and battery packs. Each battery pack has battery cells, a battery pack controller that monitors the cells, a battery pack cell balancer that adjusts the amount of energy stored in the cells, and a battery pack charger. The battery pack controller operates the battery pack cell balancer and the battery pack charger to control the state-of-charge of the cells. In an embodiment, the cells are lithium ion battery cells.

A 1.16-V 5.8-to-13.5-ppm/°C Curvature-Compensated CMOS Bandgap Reference Circuit With a Shared Offset-Cancellation Method for Internal Amplifiers

Abstract: This article introduces an accurate current-mode bandgap reference circuit design with a novel shared offset compensation scheme for its internal amplifiers. This bandgap circuit has been designed to operate over a very wide temperature range from −40 °C to 150 °C. Its output voltage is 1.16 V with a 3.3-V supply voltage. A multi-section curvature compensation method alleviates the error from the bipolar junction transistor’s base–emitter nonlinear voltage dependence on temperature. The bandgap reference circuit contains two operational amplifiers that are utilized to generate proportional-to-absolute-temperature (PTAT) and complementary-to-absolute-temperature (CTAT) current sources. With the implementation of the described shared offset-cancellation methodology, the simulated output inaccuracy introduced by the amplifier is kept to a 5 $\sigma $ offset within ±4.6 $\mu \text{V}$ while allowing to conserve die size and power consumption by preventing that each amplifier is accompanied by its own active auxiliary offset-cancellation circuit. Designed and fabricated in a 130-nm CMOS process technology, the bandgap reference has a measured output voltage shift of less than 1 mV over a −40 °C to 150 °C temperature range and an overall variation of ±8.2 mV across seven measured samples without trimming.

Battery-assisted electric vehicle charging system and method

Abstract: The disclosed systems and methods are directed to a battery assisted charging station. A battery system comprising plurality of batteries and a battery management system software controlling the operations of the battery system, function together with a vehicle charging system that charges electric vehicles using one or both of stored power provided by a battery system, and power provided by a utility power grid. The battery system uses the power grid to charge the batteries therein.

A 7-Cell, Stackable, Li-Ion Monitoring and Active/Passive Balancing IC With In-Built Cell Balancing Switches for Electric and Hybrid Vehicles

Abstract: Electric vehicles (EVs) and hybrid EVs need stacked lithium-ion (Li-ion) cells to achieve the required high voltage (HV). Cell monitoring and balancing in a stackable battery system is necessary to compensate for accumulative discharge mechanisms and keep the individual cells in the same state of charge. In this article, an integrated circuit consisting of a 12-bit successive approximation register (SAR) analog-to-digital converter is designed to measure, monitor, and balance Li-ion cell voltages with a measured accuracy of $\pm$ 7 mV. These stacked cells are compared simultaneously with a reference voltage to balance the cells. Balancing switches for charging/discharging of the cells are integrated within the circuit to support a balancing current of up to 100 mA, which reduces the number of external components for balancing significantly. The circuit supports both active and passive balancing. A synchronous voltage mode level shifting circuit is implemented for communication between the stacked integrated circuits (ICs) to eliminate external components. Internal linear drop outs (LDOs) (3 and 5 V) power most of the blocks in the IC. The design is fabricated in HV 0.35 $\mu$ m complementary metal oxide semiconductor (CMOS) technology and found to consume a quiescent current of 17 $\mu$ A.