S
Sukeshni Tirkey
Researcher at Indian Institute of Information Technology, Design and Manufacturing, Jabalpur
Publications - 21
Citations - 472
Sukeshni Tirkey is an academic researcher from Indian Institute of Information Technology, Design and Manufacturing, Jabalpur. The author has contributed to research in topics: Tunnel field-effect transistor & Gate dielectric. The author has an hindex of 8, co-authored 19 publications receiving 257 citations. Previous affiliations of Sukeshni Tirkey include National Institute of Technology, Raipur & Indian Institutes of Information Technology.
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Performance Assessment of A Novel Vertical Dielectrically Modulated TFET-Based Biosensor
TL;DR: In this article, a vertical dielectrically modulated tunnel field effect transistor (V-DMTFET) was used as a label-free biosensor for the first time and compared with lateral DMTFET using underlap concept and gate work function engineering.
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A New Design Approach of Dopingless Tunnel FET for Enhancement of Device Characteristics
TL;DR: A novel design of DL TFET is proposed, wherein a metallic layer has been placed in the oxide region at the space present between gate and source electrode of conventional dopingless n-TFET to overcome the issue of low on-state current.
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Analysis of a Novel Metal Implant Junctionless Tunnel FET for Better DC and Analog/RF Electrostatic Parameters
TL;DR: In this paper, a junctionless tunnel FET with a metal implanted in the oxide at the source/channel and drain/channel junctions to enhance its ON-current and reduce the ambipolar nature is presented.
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A Novel Approach to Improve the Performance of Charge Plasma Tunnel Field-Effect Transistor
TL;DR: In this article, a distinct approach for realizing charge plasma tunnel field effect transistor (CP TFET) was presented, where p+ substrate is taken as silicon film and then metal electrodes with specific work functions are deposited over the silicon film to accumulate n+ drain and intrinsic channel regions.
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Comparative investigation of novel hetero gate dielectric and drain engineered charge plasma TFET for improved DC and RF performance
TL;DR: In this paper, the authors have introduced drain and gate work function engineering with hetero gate dielectric for the first time in charge plasma based doping-less TFET (DL TFET).