Sukhendu deb Roy

Bio: Sukhendu deb Roy is an academic researcher from Indian Institute of Science. The author has contributed to research in topics: MOSFET & Breakdown voltage. The author has co-authored 2 publications.

Vertical GaN Split Gate Trench MOSFET with Improved High Frequency FOM

Abstract: Using TCAD Simulation, we present a systematic analysis and comparison of a new vertical GaN split gate trench MOSFET (SGT-MOSFET) with a conventional trench gate MOS-FET for 600 V switching applications We have calibrated our simulation models to match the experimental data as available in the literature We show that the SGT-MOSFET exhibits 7 times lower HF-FOM (C rss ×R on ) and 3 times lower HF-FOM (Q GD × R on ) without increase in the specific on-resistance, when compared to that of conventional MOSFET We, also have presented the main process steps required for the fabrication of the proposed device These improvements are important for reducing the conduction and switching losses, and making high frequency power conversion more efficient

Optimization of Vertical GaN SGT-MOSFET for Low R on

Abstract: We present a new 600 V breakdown optimized vertical GaN Split-Gate Trench power MOSFET (SGTMOSFET) device with significantly reduced specific on-resistance and lower reverse capacitance. Using TCAD numerical simulations, we demonstrate that the SGTMOSFET exhibits about 30% lower specific on-resistance and about five times reduction in the reverse capacitance when compared to a conventional TG-MOSFET with similar breakdown voltage.

A comparative analysis and an optimized structure of vertical GaN floating gate trench MOSFET for high-frequency FOM

Abstract: A vertical GaN floating gate trench MOSFET (FG-MOSFET) device structure has been optimized to obtain an enhanced high-frequency figure of merit (HF-FOM) than the conventional SGT- and TG-MOSFET. The floating gate (FG) electrode helps to reduce the surface electric field and binges in the middle of the drift layer. Using TCAD simulation, we demonstrate that with proper design of trench depth, drift doping, and field plate oxide thickness, the corresponding electric-field distribution for FG-MOSFET can be reduced to 2.3 MV cm−1. The proposed device has been designed for 600 V blocking voltage capability and with a specific on-resistance ( Ron ) as low as 0.73 mΩ cm2 due to the higher drift doping concentration. The HF-FOM ( QGD×Ron ) of FG-MOSFET shows a lower by two times and four times compared to SGT- and TG-MOSFET, due to FP oxide. Our results show that the FG-MOSFET device produces 15% and 47% reductions in the switching energy losses when compared with the similar current rated SGT- and TG-MOSFET devices, respectively.

Gate-Bias-Induced Threshold Voltage Shifts in GaN FATFETs

Abstract: The threshold voltage (V TH) stability in GaN fat field-effect transistors (FATFETs) with a large channel area of ∼6.2 × 104 μm2 was studied using drain current vs gate voltage (I D–V G) characteristics. Each measurement was found to positively shift the previous I D–V G curve, and V TH eventually saturated with increasing number of measurements. The saturated V TH was ∼0.8 V for measurements in which V G ranged from −10 to 25 V and was ∼8 V for measurements in which the V G ranged from −10 to 40 V. Moreover, the positive gate bias stress increased V TH to 12.3 V. These shifts of V TH can be explained by electron trapping; according to charge-pumping measurements, the traps cannot exist in the oxide or the oxide/p-GaN interface but can exist near the surface region in p-GaN layers in GaN FATFETs. Scanning transmission electron microscopy and electron energy-loss spectroscopy analyses revealed the presence of oxygen within several atomic layers of p-GaN from the oxide/p-GaN interface. This intermixed oxygen might be the origin of the n-type behavior of the p-GaN surface; furthermore, the oxygen is speculated to be related to the traps. Surprisingly, similar incorporated oxygen was observed even in the surface region of as-grown p-GaN layers.

An Optimized Vertical GaN Parallel Split Gate Trench MOSFET Device Structure for Improved Switching Performance

Abstract: This work proposes a vertical gallium nitride (GaN) parallel split gate trench MOSFET (PSGT-MOSFET) device architecture suitable for power conversion applications. Wherein two parallel gates, and a field plate are introduced vertically on the sidewalls and connected, respectively, to the gate and source. Technology computer-aided design (TCAD) simulator was used in the design process to achieve a specific on-resistance as low as 0.79 $\text{m}\Omega $ .cm2 for the device, which has the capacity of blocking voltages up to 600 V. The peak electric field of the PSGT-MOSFET could well be lowered to 2.95 MV/cm, which is about 17% lower than that of a conventional trench gate MOSFET (TG-MOSFET) near the trench corner with help of suitable design and optimization of trench depth, drift doping, and field plate thickness. The TCAD simulation shows that the higher drift doping on the device performance of PSGT-MOSFET produces $\sim 2\times $ lower switching losses when compared with a similarly rated conventional TG-MOSFET device.

An Optimized Vertical GaN Parallel Split Gate Trench MOSFET Device Structure for Improved Switching Performance

Abstract: This work proposes a vertical gallium nitride (GaN) parallel split gate trench MOSFET (PSGT-MOSFET) device architecture suitable for power conversion applications. Wherein two parallel gates, and a field plate are introduced vertically on the sidewalls and connected, respectively, to the gate and source. Technology computer-aided design (TCAD) simulator was used in the design process to achieve a specific on-resistance as low as 0.79 mΩ.cm ² for the device, which has the capacity of blocking voltages up to 600 V. The peak electric field of the PSGT-MOSFET could well be lowered to 2.95 MV/cm, which is about 17% lower than that of a conventional trench gate MOSFET (TG-MOSFET) near the trench corner with help of suitable design and optimization of trench depth, drift doping, and field plate thickness. The TCAD simulation shows that the higher drift doping on the device performance of PSGT-MOSFET produces ~2× lower switching losses when compared with a similarly rated conventional TG-MOSFET device.