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Author

Sung-Hoon Yang

Bio: Sung-Hoon Yang is an academic researcher from Samsung. The author has contributed to research in topics: Thin-film transistor & Layer (electronics). The author has an hindex of 15, co-authored 81 publications receiving 1818 citations.


Papers
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Patent
10 Apr 2008
TL;DR: In this paper, a method of manufacturing a thin-film transistor (TFT) substrate includes forming a first conductive pattern group including a gate electrode on a substrate, forming a gate insulating layer on the first pattern group, forming an amorphous silicon layer and an oxide semiconductor layer, and forming a protection layer including a contact hole on the second pattern group.
Abstract: A method of manufacturing a thin film transistor (“TFT”) substrate includes forming a first conductive pattern group including a gate electrode on a substrate, forming a gate insulating layer on the first conductive pattern group, forming a semiconductor layer and an ohmic contact layer on the gate insulating layer by patterning an amorphous silicon layer and an oxide semiconductor layer, forming a second conductive pattern group including a source electrode and a drain electrode on the ohmic contact layer by patterning a data metal layer, forming a protection layer including a contact hole on the second conductive pattern group, and forming a pixel electrode on the contact hole of the protection layer. The TFT substrate including the ohmic contact layer formed of an oxide semiconductor is further provided.

1,036 citations

Patent
22 Nov 2010
TL;DR: In this paper, a TFT array panel including a substrate, a gate line having a gate electrode, gate insulating layer formed on the gate line, a data line with a source electrode and a drain electrode spaced apart from the source electrode, a passivation layer formed between the data line and the drain electrode, and a pixel electrode connected to the drain electrodes is provided.
Abstract: A TFT array panel including a substrate, a gate line having a gate electrode, a gate insulating layer formed on the gate line, a data line having a source electrode and a drain electrode spaced apart from the source electrode, a passivation layer formed on the data line and the drain electrode, and a pixel electrode connected to the drain electrode is provided. The TFT array panel further includes a protection layer including Si under at least one of the gate insulating layer and the passivation layer to enhance reliability.

102 citations

Patent
30 Aug 2003
TL;DR: In this paper, a liquid crystal display device having fingerprint identification device for enhancing aperture ratio and transmissivity of a TFT-LCD panel is disclosed, where a fingerprint identification substrate (400) is attached to a tFT substrate (300), and the TFT substrate has color-filter-on-array structure in which the color filters and the thin film transistors can be eliminated, the aperture ratio is increased, and the quality of image display is enhanced.
Abstract: A liquid crystal display device having fingerprint identification device for enhancing aperture ratio and transmissivity of a TFT-LCD panel is disclosed. A fingerprint identification substrate (400) is attached to a TFT substrate (300). The TFT substrate has color-filter-on-array structure in which the color filters (336) and the thin film transistors can be eliminated, the aperture ratio is increased, and the quality of image display is enhanced. In addition, the transmissivity is increased according to the decrease of the number of glass substrate used in the liquid crystal display device, so that the sensitivity of fingerprint identification is enhanced.

63 citations

Patent
17 May 2002
TL;DR: In this paper, a process for vapor deposition of low dielectric insulating film was proposed to solve parasitic capacitance problems to realize a high aperture ratio structure, and to reduce a process time by using silane gas when vaporizing an insulating material by a CVD or PECVD method.
Abstract: The present invention relates to a process for vapor depositing a low dielectric insulating film, a thin film transistor using the same, and a preparation method thereof, and more particularly to a process for vapor deposition of low dielectric insulating film that can significantly improve a vapor deposition speed while maintaining properties of the low dielectric insulating film, thereby solving parasitic capacitance problems to realize a high aperture ratio structure, and can reduce a process time by using silane gas when vapor depositing an insulating film by a CVD or PECVD method to form a protection film for a semiconductor device. The present invention also relates to a thin film transistor using the process and preparation method thereof.

56 citations

Journal ArticleDOI
TL;DR: In this article, the authors clarified that majority carrier's effective mass and scattering rate are dominant factors influencing the bended TFT's performance, which can be controlled by the strain orientation and channel shape.
Abstract: By applying the curve-type TFT with longitudinal strain, TFT parameters do change little down to the 2R bending. The mobility variation range reduces down to 4% compared with 28% of the line-type channel with transverse strain. The smaller variation is preferred for a high quality display. We clarified that majority carrier’s effective mass and scattering rate are dominant factors influencing the bended TFT's performance, which can be controlled by the strain orientation and channel shape. These understanding and improvement was embedded in the 5.8\" flexible QHD AMOLED panel with multi edge curvature of Galaxy S8. Through this achievement, we made our flexible premium AMOLED panels more performable, reliable and highly productive in small R bending circumstance. Author

30 citations


Cited by
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Patent
01 Aug 2008
TL;DR: In this article, the oxide semiconductor film has at least a crystallized region in a channel region, which is defined as a region of interest (ROI) for a semiconductor device.
Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

1,501 citations

Patent
25 Sep 2013
TL;DR: In this paper, a connection terminal portion is provided with a plurality of connection pads which are part of the connection terminal, each of which includes a first connection pad and a second connection pad having a line width different from that of the first one.
Abstract: An object of the present invention is to decrease the resistance of a power supply line, to suppress a voltage drop in the power supply line, and to prevent defective display. A connection terminal portion includes a plurality of connection terminals. The plurality of connection terminals is provided with a plurality of connection pads which is part of the connection terminal. The plurality of connection pads includes a first connection pad and a second connection pad having a line width different from that of the first connection pad. Pitches between the plurality of connection pads are equal to each other.

1,136 citations

Patent
10 Apr 2008
TL;DR: In this paper, a method of manufacturing a thin-film transistor (TFT) substrate includes forming a first conductive pattern group including a gate electrode on a substrate, forming a gate insulating layer on the first pattern group, forming an amorphous silicon layer and an oxide semiconductor layer, and forming a protection layer including a contact hole on the second pattern group.
Abstract: A method of manufacturing a thin film transistor (“TFT”) substrate includes forming a first conductive pattern group including a gate electrode on a substrate, forming a gate insulating layer on the first conductive pattern group, forming a semiconductor layer and an ohmic contact layer on the gate insulating layer by patterning an amorphous silicon layer and an oxide semiconductor layer, forming a second conductive pattern group including a source electrode and a drain electrode on the ohmic contact layer by patterning a data metal layer, forming a protection layer including a contact hole on the second conductive pattern group, and forming a pixel electrode on the contact hole of the protection layer. The TFT substrate including the ohmic contact layer formed of an oxide semiconductor is further provided.

1,036 citations

Patent
11 Nov 2008
TL;DR: In this article, a plurality of openings having a minute contact area is provided instead of forming one penetrating opening having a large contact area to reduce a partial depression and also to ensure contact resistance.
Abstract: It is an object of the present invention to simplify steps needed to process a wiring in forming a multilayer wiring. In addition, when a droplet discharging technique or a nanoimprint technique is used to form a wiring in a contact hole having a comparatively long diameter, the wiring in accordance with the shape of the contact hole is formed, and the wiring portion of the contact hole is likely to have a depression compared with other portions. A penetrating opening is formed by irradiating a light-transmitting insulating film with laser light having high intensity and a pulse high in repetition frequency. A plurality of openings having a minute contact area is provided instead of forming one penetrating opening having a large contact area to have an even thickness of a wiring by reducing a partial depression and also to ensure contact resistance.

1,021 citations

Patent
04 Dec 2008
TL;DR: In this paper, a photoensitive material solution of a conductive film is selectively discharged by a droplet discharging method, selectively exposed to laser light, and developed or etched, thereby allowing only the region exposed to the laser light to be left and realizing a source wiring and a drain wiring having a more microscopic pattern than the pattern itself formed by discharging.
Abstract: The present invention provides a manufacturing process using a droplet-discharging method that is suitable for manufacturing a large substrate in mass production. A photosensitive material solution of a conductive film is selectively discharged by a droplet-discharging method, selectively exposed to laser light, and developed or etched, thereby allowing only the region exposed to laser light to be left and realizing a source wiring and a drain wiring having a more microscopic pattern than the pattern itself formed by discharging. One feature of the source wiring and the drain wiring is that the source wiring and the drain wiring cross an island-like semiconductor layer and overlap it.

1,001 citations