T. Baumheinrich

Bio: T. Baumheinrich is an academic researcher from General Electric. The author has contributed to research in topics: Signal conditioning & Signal. The author has an hindex of 5, co-authored 9 publications receiving 112 citations. Previous affiliations of T. Baumheinrich include Ruhr University Bochum.

A 1-GSample/s 10-b full Nyquist silicon bipolar Track&Hold IC

Abstract: This article gives a detailed presentation of an all-npn silicon bipolar Track&Hold IC for 10-b operation up to 1 GSample/s under full Nyquist conditions. Circuit techniques were implemented to reduce the pedestal, hold-mode feedthrough, and droop errors. An experimental Track&Hold IC was fabricated in a 25-GHz-f/sub T/, 0.4-/spl mu/m-emitter-width single-poly base silicon bipolar production technology. Each of the Track&Hold circuits in this IC consists of 103 active devices and consumes 490 mW from a single supply voltage, including bandgap-references and input buffers.

System, device, and method for detecting electrical discharges on a structure

Abstract: A lightning detection and damage estimation system for a structure is disclosed herein. The system includes a lightning receptor coupled to a lightning conductor configured to receive multiple lightning strikes and induce lightning current in a pick-up coil coupled to the lightning conductor. An integrated circuit coupled to the lightning conductor via the pick-up coil includes a non-volatile memory for successively storing one or more samples of the lightning induced current for the multiple lightning strikes. A damage estimation unit is configured to estimate a condition of the structure based on analyzing a history of stored samples of the lightning induced current of the multiple lightning strikes from the non-volatile memory.

Design of a high temperature signal conditioning ASIC for engine control systems - HIGHTECS

Abstract: This paper covers the development and testing of a high temperature electronics platform for integration with sensor elements to provide digital outputs that can be utilized by the FADEC (Full Authority Digital Electronic Control) system or the EHMS (Engine Health Monitoring System) on an aircraft engine. The developed system includes a reference voltage generator, biasing circuit, signal conditioning for multiple types of sensors, an Analogue to Digital converter, and an ARINC 429 transmitter for communication to the FADEC or EHMS. This system was designed and realized on 1 um Silicon-on-Insulator CMOS (Complementary Metal Oxide Semiconductor) technology and has been shown to function up to 250 degrees Celsius with low temperature coefficients for the bandgap voltage and reference current.

Design of a Silicon Bipolar Track&Hold IC for 1GSample/s and 10 bit Linearity over the full Nyquist Band

Abstract: This chapter discusses the design of a silicon bipolar Track&Hold IC achieving a linearity of 10 effective bits over the full Nyquist band for sampling frequencies up to 1 GSample/s. Suitable circuit techniques which were implemented to assure this performance will be presented in detail, as well as the simulation techniques that were applied throughout the design process. We will complete this chapter with a presentation of the measurement setup and the measured performance characteristics.

Design of a frequency signal conditioning unit applied to rotating systems in high temperature aero engine control

Abstract: This paper covers the development and testing of a high temperature mixed signal unit capable of sensing wide dynamic range signals from rotating sensors. This generates an output current proportional to the peak value of the applied input signal from a sensor. The developed unit includes a current peak detector block, a digital pulse generator and ESD protection. The digital data from the unit can be directly utilized by the FADEC (Full Authority Digital Electronic Control) system or the EHMS (Engine Health Monitoring System) on an aeroengine. This mixed signal system was designed and realized on 1 um Silicon-on-Insulator CMOS (Complementary Metal Oxide Semiconductor) technology and has been shown to function up to 235°Celsius with very high linearity of the output signal.

A 16-bit 250-MS/s IF Sampling Pipelined ADC With Background Calibration

Abstract: This paper describes a 16-bit 250 MS/s ADC fabricated on a 0.18 BiCMOS process. The ADC has an integrated input buffer with a new linearization technique that improves its distortion by 5-10 dB and lowers its power consumption by 70% relative to the state of the art. It demonstrates a new background calibration technique to correct the residue amplifier (RA) gain errors and lower its power consumption. This summing node sampling (SNS) calibration technique is based on sampling the summing-node voltage of the residue amplifier and using it with the corresponding residue to estimate the amplifier open loop gain. The ADC achieves an SNDR of 76.5 dB and consumes 850 mW from a 1.8 V supply, while the input buffer consumes 150 mW from a 3 V supply. Up to 125 MS/s, the SFDR is greater than 100 dB for input frequencies up to 100 MHz and 90 dB up to 300 MHz input frequency. At 250 MS/s, the SFDR is greater than 95 dB up to 100MHz and 85 dB up to 300 MHz.

Circuit Techniques for Low-Voltage and High-Speed A/D Converters

Abstract: 1. Introduction. 2. Low Voltage Issues. 3. Sample-and-Hold Operation. 4. A/D Converters. 5. S/H Circuit Architectures. 6. Sampling with a MOS Transistor Switch. 7. Operational Amplifiers. 8. Clock Generation. 9. Double-Sampling. 10. Switched OpAmp Technique. 11. Other Low-Voltage Techniques. 12. Prototypes and Experimental Results. 13. Conclusions. Appendices: Derivation of OTA GBW Requirement. Optimum Input Capacitance. Saturation Voltage.

A broadband 10-GHz track-and-hold in Si/SiGe HBT technology

Abstract: High-performance multistage data converters and sub-sampling frequency downconverters typically require track and hold amplifiers (THAs) with high sampling rates and high linearity. This paper presents a THA for sub-sampling communications applications based on a diode bridge design with high-speed Schottky diodes and an improved current source approach for enhanced linearity. Implemented in a 45-GHz BiCMOS Si/SiGe process, this IC has an input bandwidth in excess of 10 GHz, consumes approximately 550 mW, and can accommodate input voltages up to 600 mV. With an input frequency of 8.05 GHz and a sampling frequency of 4 GHz, the THA has an IIP3 of 26 dBm and a spurious free dynamic range of 30 dB.

A 10-b 185-MS/s track-and-hold in 0.35-/spl mu/m CMOS

Abstract: This paper discusses the design and the implementation of a high-speed track-and-hold amplifier in 0.35-/spl mu/m CMOS, featuring 10-b resolution up to 185 MS/s. The implemented folded-cascode input buffer allows a relatively large input range, 1-V/sub pp/ differential, and low harmonic distortion at the same time. The sampler is based oh a switched-source-follower (SSF) architecture with double switch-off action and saturation-mode switches, providing short aperture times and high linearity. A spur-free dynamic range (SFDR) of 63 dB at 185 MS/s was measured with a dual-tone 45-MHz/spl plusmn/250-kHz test signal. The open-loop architecture makes harmonic distortion little sensitive to the input frequency: 10-b resolution is maintained up to 45 MHz with 1 V/sub pp/ and up to 70 MHz with 0.7 V/sub pp/. A suitable hold-mode feedthrough rejection is achieved by means of feedforward cancellation with a MOS capacitor operating in depletion or accumulation. The track-and-hold amplifier consumes 70 mW from a 3.3-V supply.

A 6-b 12-GSamples/s track-and-hold amplifier in InP DHBT technology

Abstract: This paper presents a 6-b 12-GSample/s track-and-hold amplifier (THA) fabricated in an InP-InGaAs-InP double heterojunction bipolar transistor (DHBT) technology. The THA is intended for the front end of a high-speed analog-to-digital converter in a digital-based electronic polarization-mode dispersion compensation circuit for a 10-Gb/s optical receiver. With a high-speed switched emitter follower and clocked track-to-hold transition operation, it shows the signal bandwidth over 14 GHz and features a total harmonic distortion (THD) compatible with 6-b operation with input frequency of 6 GHz and a sampling frequency of 12 GHz. The THD increases better than -23 dB with a 12-GHz input signal of 1 V/sub pp/, corresponding to a 4-b resolution, under a differential clock of 12 GHz.