Electrolytic capacitors are widely used in various power electronic systems, such as adjustable speed drives (ASD) or uninterruptible power supplies (UPS). Their high energy density (J/cm 3) features make them an attractive candidate for smoothing voltage ripple and pulse discharge circuitry. However, electrolytic capacitors have the shortest life span of components in power electronic circuits, usually due to their wear-out failure. The main wear-out mechanisms in electrolytic capacitors are the loss of the electrolyte by vapor diffusion trough the seals and the deterioration of the electrolyte. Both mechanisms can result in a fluctuation of the capacitor's internal equivalent series resistance (ESR). In this paper, a real time diagnostic method of the ESR of the electrolytic capacitors in ASDs and UPSs is presented. This method is employed satisfactorily to estimate their deterioration condition. An on board implementation of this method is proposed, which can be very helpful for preventing down time and alerting plant operators to needed maintenance and/or replacement. The approach does not involve removing the capacitor bank from its device and relies on the fact that in steady state, the power in the capacitor is only due to the power losses in the ESR. An analog-DSP based diagnostic system has been implemented and experimental results from a 3-phase 6 kVA/230 V ASD are presented

A Real Time Method to Estimate Electrolytic Capacitor Condition in PWM Adjustable Speed Drives and Uninterruptible Power Supplies

This work analyzes the effects of the input voltage unbalance and sags on the DC bus electrolytic capacitors in adjustable-speed drives (ASDs) in order to predict their impact on expected capacitor lifetime. The key phenomenon that causes these problems is the transition of the rectifier stage from three-phase to single-phase operation. Since the ESR (equivalent series resistance) increases at low frequencies, the low-order harmonic current components (120 Hz, 240 Hz, etc.) contribute disproportionately to the capacitor power losses and temperature rise, resulting in reduced lifetime. Closed-form expressions are developed for predicting these effects including the impact of finite line impedance, finite bus capacitance, and varying load. The impact of inverter SVPWM (space vector pulse width modulation) switching on the capacitor loss is also included. Simulations and experimental tests are used to verify the accuracy and effectiveness of the closed-form analysis using a 5 hp ASD system.

DC bus electrolytic capacitor stress in adjustable- speed drives under input voltage unbalance and sag conditions

This paper investigates the impact of input voltage unbalance and sags on stresses in the dc-bus choke inductor and dc-bus electrolytic capacitors of adjustable-speed drives (ASDs). These stresses are primarily attributable to the rectifier's transition into single-phase operation, giving rise to low-order harmonic voltages (120 Hz, 240 Hz, etc.) that are applied to the dc-link filter components. These harmonics elevate the ac-flux densities in the dc choke core material significantly above values experienced during normal balanced-excitation conditions, causing additional core losses and potential magnetic saturation of the core. It is shown that the effects of voltage unbalances and sags on the dc-link capacitor lifetime will be the same when either line inductors or a dc-link choke inductor are used if the dc choke-inductance value is twice the value of the line inductance. Simulations and experimental tests are used to verify the accuracy of predictions provided by closed-form analysis and simulation for a 5-hp or 3730-W ASD system.

Impact of input voltage sag and unbalance on dc link inductor and capacitor stress in adjustable speed drives

This paper evaluates the changes in the ripple current for an electrolytic capacitor used in the dc-side of a single-phase rectifier circuit when subjected to input voltage fluctuations. The study has been undertaken in order to analyse the potential impact on capacitor lifetime. The key effect is that the capacitor ripple current, as a consequence of voltage fluctuations, increases dramatically and this phenomenon keeps deteriorating as the frequency of the voltage fluctuations increases. Simulations and experimental work confirm this phenomenon. Since the power loss and temperature rise are dependent on the capacitor equivalent series resistance (ESR) and ripple current components, an increase in ripple current under voltage fluctuation conditions is likely to accelerate this process, resulting in a reduced lifetime.

/pdf/lifetime-analysis-of-aluminum-electrolytic-capacitor-subject-59052vuuxx.pdf

Lifetime analysis of aluminum electrolytic capacitor subject to voltage fluctuations

To my loving mother, and fond memories of my father iv ACKNOWLEDGEMENTS It has been four and a half years since I started my PhD in fall 2002 and I was fortunate to enjoy the guidance, assistance, support, and friendship of many without whom this work would not have taken shape. Here, I hope to express my gratitude to most of them. forever grateful to them for letting me pursue my research under their guidance. Their invaluable suggestions at difficult times have contributed a lot towards the success of this thesis. I would like to thank Prof. Thomas G. Habetler for helping me to choose the research topic and being a continuous source of inspiration. I have benefited immensely from his knowledge and experience. I would also like to thank Prof. for taking some time of their busy schedule to serve on my PhD defense committee. I would like to thank Mr. Paul Springer of NEETRAC for providing the financial support for my graduate studies. I must also thank the machinists, Lorand Csizar and Louis Boulanger, who were always available and willing to help with the laboratory experimental setup. I would also like to thank Deborah King for patiently putting up with my frequent purchase requests and room reservations.

/pdf/condition-monitoring-of-electrolytic-capacitors-for-power-1gxkfhttgg.pdf

Condition Monitoring of Electrolytic Capacitors for Power Electronics Applications

The overall performance and efficiency of a voltage source inverter (VSI) can be improved by selecting a combination of DC link capacitance and DC link inductance based upon a weighted optimization criterion. Developments of semiconductor technology have enabled present semiconductor devices to operate with improved power losses, to a great extent. However, there is still a considerable amount of power loss in the DC link capacitor bank and DC link inductor. These loss components are normally ignored to a certain level in terms of design/efficiency optimization, in the design phase of the drive. Therefore, there are additional opportunities to optimize the design by selecting the capacitor/inductance combination for minimum power losses or for any other optimum such as size and weight or cost. This paper describes the modeling of the PWM AC drive, AC motor and special modeling of the DC bus capacitor and DC link inductor, using the SABER simulator. The paper compares the SABER simulation results with the experimental data to verify the accuracy of the model, for given values of DC link inductance and bus capacitance as the first step towards modeling the overall system for accurate prediction of the drive performance.

T.P. Gilmore

Papers

Modeling and analysis of DC link bus capacitor and inductor heating effect on AC drives. I