T
Tad Kwasniewski
Researcher at Carleton University
Publications - 155
Citations - 2166
Tad Kwasniewski is an academic researcher from Carleton University. The author has contributed to research in topics: CMOS & Phase-locked loop. The author has an hindex of 20, co-authored 155 publications receiving 2118 citations. Previous affiliations of Tad Kwasniewski include Altera.
Papers
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Journal ArticleDOI
Delta-sigma modulation in fractional-N frequency synthesis
TL;DR: In this article, a delta-sigma (Delta-Sigma) modulation and fractional-N frequency division technique for indirect digital frequency synthesis using a phase-locked loop (PLL) is described.
Journal ArticleDOI
A 1.25-GHz 0.35-/spl mu/m monolithic CMOS PLL based on a multiphase ring oscillator
Lizhong Sun,Tad Kwasniewski +1 more
TL;DR: In this article, a general ring oscillator topology for multiphase outputs is presented and analyzed, which uses the interpolating inverter stages to construct fast subfeedback loops for long chain rings to obtain both multi-phase outputs and higher speed operation.
Journal ArticleDOI
CMOS VCO's for PLL frequency synthesis in GHz digital mobile radio communications
M. Thamsirianunt,Tad Kwasniewski +1 more
TL;DR: The proposed linearized MOSFET model allows the accurate prediction of the operating frequency while the phase noise evaluation technique makes it possible to determine, through simulation, the relative phase-noise performance of different oscillator architectures.
Proceedings ArticleDOI
A 40-GHz Frequency Divider in 90-nm CMOS Technology
M. Usama,Tad Kwasniewski +1 more
TL;DR: In this article, a high-speed wideband frequency divider is presented, which is formed with a low voltage swing current mode logic (CML) structure, which enables high frequency operation at very low power dissipation.
Journal ArticleDOI
A Low-Phase Noise, Anti-Harmonic Programmable DLL Frequency Multiplier With Period Error Compensation for Spur Reduction
TL;DR: A low phase noise, delay-locked loop-based programmable frequency multiplier, with the multiplication ratio from 13 to 20 and output frequency range from 900 MHz to 2.9 GHz, is reported in this brief.