Takuya Sasaki

Bio: Takuya Sasaki is an academic researcher from Tohoku University. The author has contributed to research in topics: Residual stress & Flip chip. The author has an hindex of 3, co-authored 10 publications receiving 29 citations.

Optically Flat Micromirror Using Stretched Membrane with Crystallization-Induced Stress

Abstract: The flat and light-weighted micromirror is realized using the tense poly-Si film across a rigid c-Si drum. The tensile stress of ~600 MPa is obtained using the crystallization of a-Si film. Compared to the research carried out by Nee et al., the initial film has the purer amorphous phase and generates larger stress. The mirror satisfies the better optical flatness

Measurement of the local residual stress between fine metallic bumps in 3D flip chip structures

Abstract: The local thermal deformation of the chips mounted by area-arrayed fine bumps has increased drastically because of the decrease of the flexural rigidity of the thinned chips. In this paper, the dominant structural factors of the local residual stress in a silicon chip are investigated quantitatively based on the measurement of the local residual stress in a chip using stress sensor chips. The piezoresistive strain gauges were embedded in the sensor chips. The length of each gauge was 2 µm and a unit cell consisted of four gauges with different crystallographic directions. This alignment of strain gauges enables to measure the tensor component of three-dimensional stress fields separately. Test flip chip substrates were made by silicon chip on which the area-arrayed tin/copper bumps were electroplated. The width of a bump was fixed at 200 µm and the bump pitch was varied from 400 µm to 1,000 µm. The measured amplitude of the residual stress increased from about 30 MPa to 250 MPa. It was confirmed that both the material constant of underfill and the alignment structure of fine bumps are the dominant factors of the local deformation and stress of a silicon chip mounted on area-arrayed metallic bumps.

Measurement of Local Two Dimensional Stress Distribution in a Flip Chip Structure by Using Strain Sensor Chips with 2-.MU.m Long Piezoresistance Gauges

Abstract: フリップチップ実装構造内では構造材料であるシリコンや金属バンプ，アンダーフィル，樹脂基板などの弾性率および線膨張係数の相違に起因して局所残留応力分布が発生する。この残留応力の変動振幅が局所的に最大で300 MPaにも達することを，三次元応力解析と試作したゲージ長2 μmのピエゾ抵抗ゲージを搭載したセンサチップを用いて明らかにした。また，Siチップ面内の直交二軸方向の垂直応力の値が変形拘束物となる金属バンプからの距離に依存して大きく変化し，チップ面内のバンプ配置位置に依存して二軸等方的な場が形成される場所と最大で150 MPa以上の差が発生する異方的な場が形成される場所が混在することも明らかにした。

50μm gap 8×8 pixels deformable mirror fabricated by membrane transfer process

Abstract: We propose, design and fabricate here an electrostatically actuated continuous single-crystal-silicon membrane deformable mirror (DM) for astronomical observation. A 50μm air gap is generated a large between the mirror membrane and the electrode to get a large stroke. A DM with a 4mm×4mm mirror membrane and 8×8 underlying electrode array a is fabricated by combining Au-Si eutectic wafer bonding and the subsequent all-dry release process.

Simultaneous Realization of Stabilized Temperature Characteristics and Low-Voltage Driving of a Micromirror Using the Thin-Film Torsion Bar of Tensile Poly-Si

Abstract: The tense thin-film torsion bar of polycrystalline (poly-) Si has been recently introduced into a micromirror. A tensile stress is obtained by the crystallization of amorphous Si. The poly-Si has almost the same coefficient of thermal expansion as that of Si substrate. An electrical connection is obtained with doping without the use of metal overlayer. The thin-film torsion bar of poly-Si is fabricated with a revised process so as to protect against the crystalline Si etching. Considering the earlier advantages and techniques, the stabilized temperature characteristics and the low-voltage driving are simultaneously realized.

Initial deflection of silicon-on-insulator thin membrane micro-mirror and fabrication of varifocal mirror

Abstract: Thin membranes fabricated from silicon-on-insulator (SOI) wafer are valuable for deformable mirrors. The mirror is controlled to generate a specific wave-front with precision smaller than a wavelength. Here, we investigate quantitatively the initial deflection of the thin membrane mirrors fabricated from SOI wafer, which are often used in micro-electro-mechanical systems. A 1-μm-thick and 450-μm-diameter mirror fabricated from SOI wafer deflects upward around the circumference at an angle of 0.12°. The maximum deflection of the mirror is 320 nm at the center. The stress conditions of the mirrors are analyzed on the basis of material strength theory. The deflection is explained by the residual stress of the buried oxide layer of SOI wafer. The in-plane stresses of the micro-mirrors of diameters from 450 μm to 860 μm range from compressive stress of 1.2 MPa to tensile stress of 2.1 MPa. Furthermore, based on the above experimental and theoretical analyses, a 1-μm-thick varifocal micro-mirror of the diameter of 400 μm is fabricated. The focus of the mirror is varied from −28 mm to 21 mm with the deviation smaller than 4 nm from parabola in the mirror central region.

A Freestanding GaN/HfO $_{\bf 2}$ Membrane Grown by Molecular Beam Epitaxy for GaN–Si Hybrid MEMS

Abstract: Combination of GaN light source and Si-microelectromechanical systems (MEMSs) is a promising hybrid structure for optical MEMS. As one of GaN-Si hybrid structures, a freestanding GaN/HfO2 membrane was fabricated on Si substrate. Unlike conventional GaN membrane on Si substrate, the fabricated membrane had a tensile stress by using the HfO2 layer. Therefore, the GaN/HfO2 membrane was flat enough to be useful for several MEMS. The GaN crystal was grown by molecular beam epitaxy on the HfO2 layer deposited on Si substrate. The surface of the HfO2 layer was nitrified before GaN crystal growth, and thus, a part of HfO2 surface was changed to HfN, the lattice of which matched well to that of GaN. The characteristics of the GaN crystal grown on the nitrified HfO2 layer were also investigated.

High quality single crystal Ge nano-membranes for opto-electronic integrated circuitry

Abstract: A thin, flat, and single crystal germanium membrane would be an ideal platform on which to mount sensors or integrate photonic and electronic devices, using standard silicon processing technology. We present a fabrication technique compatible with integrated-circuit wafer scale processing to produce membranes of thickness between 60 nm and 800 nm, with large areas of up to 3.5 mm2. We show how the optical properties change with thickness, including appearance of Fabry-Perot type interference in thin membranes. The membranes have low Q-factors, which allow the platforms to counteract distortion during agitation and movement. Finally, we report on the physical characteristics showing sub-nm roughness and a homogenous strain profile throughout the freestanding layer, making the single crystal Ge membrane an excellent platform for further epitaxial growth or deposition of materials.

Single-Crystal PMN-PT MEMS Deformable Mirrors

Abstract: This paper describes microelectromechanical systems deformable mirrors (DMs) fabricated from Pb(Mg1/3Nb2/3)O3-PbTiO3 single crystal (PMN-PT) for use in ocular adaptive optics. The DM is a piezoelectric unimorph with 35 actuators on a 13-mm circular membrane. Each actuator inside the 8-mm pupil achieves a static stroke of over 5 μm at 10 V. Dynamic measurements prove that the DM can be operated up to a 2.27-kHz bandwidth. The large stroke with low driving voltage and high operating bandwidth confirm that the DM is a promising candidate for use as a wavefront corrector in vision science applications. The measured piezoelectric properties of the PMN-PT are in close agreement with factory specifications, demonstrating that the piezoelectric properties of single-crystal PMN-PT are not degraded by the bonding and lapping process used here. The large 13-mm-diameter 30-μm-thick membrane is produced by constructing silicon rings to protect the membrane from the considerable compressive stress present in the SiO2 layer of a silicon-on-insulator wafer. In the prototype mirror, residual stress in the electrode metal results in an initial peak-to-valley surface flatness of 3.3 μm which is reduced to 0.7 μm by iterative computation of the control voltages applied to the electrodes.