A fully-integrated 77 GHz frequency doubling two-path phased-array frequency-modulated continuous-wave (FMCW) transceiver for automotive radar applications is proposed. By utilizing the frequency doubling scheme, the chirp bandwidth is improved, and the complexity of the frequency synthesizer and the insertion loss of the local-oscillating (LO) distribution network are both reduced. Top-injected coupled resonator based wide locking range technique is proposed in the frequency doublers to minimize the required injection power to cover the chirp bandwidth plus enough PVT variation margin, and therefore reduce the power consumption of the LO distribution network. Current-reused coupled resonator technique is utilized to implement the LO phase shifting in each receiving path. The digitally controlled artificial dielectric-based transmission lines are inserted in the low noise amplifiers to provide the operation frequency calibration capability. The receiving two-path signals are converted into intermediate frequency by low flicker noise current-mode passive mixers and then combined in the trans-impedance amplifier, followed by the reconfigurable analog baseband processing. Fabricated in 65 nm CMOS, the FMCW transceiver has achieved 1.93 GHz maximum chirp bandwidth, $12.9\sim 13.2$ dBm maximum transmitting power, and $47.8\sim 100.7$ dB programmable receiving conversion gain. The transceiver consumes 343 mW power and 4.64 mm2 chip area including all of the pads.

A 77 GHz Frequency Doubling Two-Path Phased-Array FMCW Transceiver for Automotive Radar

This paper presents the dual-injection-locking technique to enhance the locking range of resonator-based frequency dividers. By fully utilizing the voltage and current injection of the input signal, the divider locking range is extended significantly. The 0.8-mW dual-injection-locked frequency divider was developed in 90-nm digital CMOS technology. The total chip size is 0.77 mm times 0.5 mm. Without any varactor or inductor tuning, the input signal frequency coverage of the divider is from 35.7 to 54.9 GHz. Combined with the excellent locking range and sub-milliwatt power consumption, the figure-of-merit of this work surpasses those of the previous resonator-based dividers by more than one order.

A 0.8-mW 55-GHz Dual-Injection-Locked CMOS Frequency Divider

This paper presents a 77-GHz long-range automotive radar transceiver with the function of reducing mutual interference. The proposed frequency-hopping random chirp FMCW technique reconfigures the chirp sweep frequency and time every cycle to result in noise-like frequency response for mutual interference after the received signal is down-converted and demodulated. Thus, the false alarm rate can be reduced significantly. The transceiver IC is fully integrated in TSMC 1P9M 65-nm digital CMOS technology. The chip including pads occupies a silicon area of 1.03 mm × 0.94 mm. The transceiver consumes totally 275 mW of power, and the measured transmitting power and receiver noise figure are 6.4 dBm and 14.8 dB, respectively. To the authors' knowledge, this is the first integrated 77-GHz automotive radar transceiver with the feature of anti-interference.

A 77-GHz CMOS Automotive Radar Transceiver With Anti-Interference Function

As the use of automotive radar increases, performance limitations associated with radar-to-radar interference will become more significant. In this paper, we employ tools from stochastic geometry to characterize the statistics of radar interference. Specifically, using two different models for the spatial distributions of vehicles, namely, a Poisson point process and a Bernoulli lattice process, we calculate for each case the interference statistics and obtain analytical expressions for the probability of successful range estimation. This paper shows that the regularity of the geometrical model appears to have limited effect on the interference statistics, and so it is possible to obtain tractable tight bounds for the worst case performance. A technique is proposed for designing the duty cycle for the random spectrum access, which optimizes the total performance. This analytical framework is verified using Monte Carlo simulations.

Stochastic Geometry Methods for Modeling Automotive Radar Interference

This paper describes a fully-integrated 77-GHz ultra-wideband pseudo-random noise (PRN) radar transceiver in a Silicon-Germanium technology. The transceiver is equipped with a programmable pseudo-random binary sequence (PRBS) generator, which is realized in a current-mode logic topology and can be operated with a clock rate of up to 4.25 GHz to enable a range resolution of 3.5 cm. The signal generation unit is simplified by including a frequency multiplier to create a 76.5-GHz carrier signal from a single 4.25-GHz input, that is also used as a clock for the PRBS generator. The transceiver achieves a phase noise of -105.3 dBc/Hz at 1-MHz offset frequency, a transmit output power of 6.2 dBm, a receive gain of 24 dB and an input-referred 1-dB compression point of -14 dBm. Track&hold circuits included in the receive path allow the use of a sub-sampling technique to reduce the IF data rate down to 1 MHz. Radar measurements with two PRN transceivers with different primitive polynomials were done concurrently to show a fundamental function of the programmable PRBS generator. Radar measurements with the PRN and the frequency-modulated continuous-wave (FMCW) principles show comparable results and the PRN radar proves to be a real alternative to the FMCW radar.

A Fully-Integrated 77-GHz UWB Pseudo-Random Noise Radar Transceiver With a Programmable Sequence Generator in SiGe Technology

A dual-injection locked frequency dividing circuit is proposed, which is designed for integration to a gigahertz signal processing circuit system for providing a frequency dividing function to gigahertz signals. The proposed circuit architecture is characterized by the provision of a dual-injection interface module on the input end for dividing the input signal into two parts for use as two injection signals, wherein the first injection signal is rendered in the form of a voltage signal and injected through a direct injection manner to the internal oscillation circuitry, while the second injection signal is rendered in the form of an electrical current and injected through a resonant circuit to the internal oscillation circuitry. This feature allow the proposed frequency dividing circuit to have broad frequency locking range and low power consumption.

Dual-injection locked frequency dividing circuit

This paper presents the design and analysis of a 60-GHz 0.13-mum CMOS divide-by-three frequency divider (FD). The regenerative injection-locked technique is proposed to achieve divide-by-three function at millimeter-wave frequency. The novel level shifter is used to increase the overdrive voltage of the input switch of the loop divider such that the divider locking range and input sensitivity can be enhanced. The CMOS divide-by-three FD including the testing pads occupies the silicon area of 0.99 mm t 0.69 mm. Operated at 1.3 V, the CMOS divider consumes 13 mW of power. The measured locking range is 1.8 GHz around the input frequency of 59 GHz, and the phase noise of the output signal at 1-MHz offset is -131.36 dBc/Hz.

A 60-GHz 0.13- $\mu{\hbox{m}}$ CMOS Divide-by-Three Frequency Divider

This paper presents a 77-GHz CMOS frequency-modulated continuous-wave (FMCW) frequency synthesizer with the capability of reconfigurable chirps. The frequency-sweep range and sweep time of the chirp signals can be reconfigured every cycle such that the frequency-hopping random chirp signal can be realized for an FMCW radar transceiver. The frequency synthesizer adopts the fractional-N phase-locked-loop technique and is fully integrated in TSMC 65-nm digital CMOS technology. The silicon area of the synthesizer is 0.65 mm × 0.45 mm and it consumes 51.3 mW of power. The measured output phase noise of the synthesizer is -85.1 dBc/Hz at 1-MHz offset and the root-mean-square modulation frequency error is smaller than 73 kHz.

Tang-Nian Luo

Papers

A 0.8-mW 55-GHz Dual-Injection-Locked CMOS Frequency Divider

A 77-GHz CMOS Automotive Radar Transceiver With Anti-Interference Function

Dual-injection locked frequency dividing circuit

A 60-GHz 0.13- $\mu{\hbox{m}}$ CMOS Divide-by-Three Frequency Divider

A 77-GHz CMOS FMCW Frequency Synthesizer With Reconfigurable Chirps