This paper describes the latest and most advanced surface-potential-based model jointly developed by The Pennsylvania State University and Philips. Specific topics include model structure, mobility and velocity saturation description, further development and verification of symmetric linearization method, recent advances in the computational techniques for the surface potential, modeling of gate tunneling current, inclusion of the retrograde impurity profile, and noise sources. The emphasis of this paper is on incorporating the recent advances in MOS device physics and modeling within the compact modeling context

PSP: An Advanced Surface-Potential-Based MOSFET Model for Circuit Simulation

A review of gate tunneling current in MOS devices

Explicit continuous models for both double-gate (DG) and surrounding-gate (SG) MOSFETs are presented. These models evolve from previous DG and SG MOSFETs models, which need to solve implicit equations for intermediate parameters by numerical iteration or the table lookup method. By developing approximate explicit solutions for the intermediate parameters, we can express the drain current, terminal charge, transconductance, and transcapacitance as explicit functions of applied voltages as well as the structural parameters. High accuracy and efficiency, combined with inherited favorable features from the previous models, make these new models suitable for circuit simulation programs.

Explicit Continuous Models for Double-Gate and Surrounding-Gate MOSFETs

This work describes an advanced physics-based compact MOSFET model (SP). Both the quasistatic and nonquasi-static versions of SP are surface-potential-based. The model is symmetric, includes the accumulation region, small-geometry effects, and has a consistent current and charge formulation. The surface potential is computed analytically and there are no iterative loops anywhere in the model. Availability of the surface potential in the source-drain overlap regions enables a physics-based formulation of the extrinsic model (e.g., gate tunneling current) and allows for a noise model free of discontinuities or unphysical interpolation schemes. Simulation results are used to illustrate the interplay between the model structure and circuit design.

SP: an advanced surface-potential-based compact MOSFET model

Compact modeling of the most important high-frequency (HF) noise sources of the MOSFET is presented in this paper, along with challenges in noise measurement and deembedding of future CMOS technologies. Several channel thermal noise models are reviewed and their ability to predict the channel noise of extremely small devices is discussed. The impact of technology scaling on noise performance of MOSFETs is also investigated by means of analytical expressions. It is shown that the gate tunneling current has a significant impact on MOSFETs noise parameters, especially at lower frequencies. Limitations of some commonly used noise models in predicting the HF noise parameters of modern MOSFETs are addressed and methods to alleviate some of the limitations are discussed

High-Frequency Noise of Modern MOSFETs: Compact Modeling and Measurement Issues

A particularly simple form of the charge-sheet model (CSM) is developed using symmetric linearization of the bulk charge as a function of the surface potential. The new formulation is verified by comparison with the original form of the CSM and is used to obtain a simple and accurate expressions for the quasi-static (QS) terminal charges based on the Ward-Dutton partition. Combined with the spline collocation version of the weighted residuals method, symmetric linearization leads to a relatively simple version of the nonquasi-static (NQS) MOSFET model. The efficiency of the proposed approach to MOSFET modeling is enhanced by taking advantage of the recently developed noniterative algorithm for computing surface potential as a function of the terminal voltages. An important symmetry of the various MOSFET characteristics with respect to the source/drain interchange is preserved in both the QS and NQS versions of the symmetrically linearized CSM.

Quasi-static and nonquasi-static compact MOSFET models based on symmetric linearization of the bulk and inversion charges

Aggressive scaling of the gate-oxide thickness has made gate-tunneling current an essential aspect of MOSFET modeling. This work presents a novel physics-based compact model of gate current in the n-MOSFET. A simplified version of the Esaki-Tsu formula is developed to calculate the tunneling current density, in which the original integral is approximated to retain the essential physics without sacrificing computational efficiency required in a compact model. The proposed model is surface potential-based in both the channel and source/drain overlap regions. The channel component of the gate current is physically partitioned into the source and drain parts using a symmetrically linearized version of the charge-sheet model. The partition is implemented in analytical form and accounts for the drain bias dependence of the channel component. A small number of adjustable parameters is sufficient to reproduce the experimentally observed bias and geometry dependence of the gate current for several advanced processes.

A surface potential-based compact model of n-MOSFET gate-tunneling current

The traditional form of the implicit equation for the surface potential (/spl phi//sub s/) in metal-oxide-semiconductor field-effect transistors (MOSFETs) works well except near the flatband point /spl phi//sub s/=0 where it is both unphysical and ill-conditioned mathematically. This represents a significant difficulty for recent surface potential-based models, which require /spl phi//sub s/ evaluation from the accumulation to the strong inversion region. Detailed physical analysis combined with two-dimensional numerical simulations is used to develop a physics-based well-conditioned version of the surface potential equation.

Ten-Lon Chen

Papers

SP: an advanced surface-potential-based compact MOSFET model

Quasi-static and nonquasi-static compact MOSFET models based on symmetric linearization of the bulk and inversion charges

A surface potential-based compact model of n-MOSFET gate-tunneling current

Physics-based mathematical conditioning of the MOSFET surface potential equation