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Teresa Riesgo

Other affiliations: Centra, ETSI
Bio: Teresa Riesgo is an academic researcher from Technical University of Madrid. The author has contributed to research in topics: Control reconfiguration & Wireless sensor network. The author has an hindex of 25, co-authored 169 publications receiving 2172 citations. Previous affiliations of Teresa Riesgo include Centra & ETSI.


Papers
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Journal ArticleDOI
TL;DR: Simulations and experimental results show the feasibility of the FPGAs based digital control for a power factor correction (PFC) flyback AC/DC converter, opening interesting possibilities in power converters control.
Abstract: Nowadays, most digital controls for power converters are based on DSPs. This paper presents a field programmable gate array (FPGA) based digital control for a power factor correction (PFC) flyback AC/DC converter. The main difference from DSP-based solutions is that FPGAs allow concurrent operation (simultaneous execution of all control procedures), enabling high performance and novel control methods. The control algorithm has been developed using a hardware description language (VHDL), which provides great flexibility and technology independence. The controller has been designed as simple as possible while maintaining good accuracy and dynamic response. Simulations and experimental results show the feasibility of the method, opening interesting possibilities in power converters control.

162 citations

Proceedings ArticleDOI
24 Dec 2012
TL;DR: A prototype system of Smart Parking Services based on Wireless Sensor Networks (WSNs) that allows vehicle drivers to effectively find the free parking places and also the vehicle driver can find vacant parking lots using standard mobile devices.
Abstract: In this paper, we present the design and implementation of a prototype system of Smart Parking Services based on Wireless Sensor Networks (WSNs) that allows vehicle drivers to effectively find the free parking places. The proposed scheme consists of wireless sensor networks, embedded web-server, central web-server and mobile phone application. In the system, low-cost wireless sensors networks modules are deployed into each parking slot equipped with one sensor node. The state of the parking slot is detected by sensor node and is reported periodically to embedded web-server via the deployed wireless sensor networks. This information is sent to central web-server using Wi-Fi networks in real-time, and also the vehicle driver can find vacant parking lots using standard mobile devices.

103 citations

Journal ArticleDOI
TL;DR: The most important stages of the design flow and the computer-aided design tools involved are presented, from the initial specification to the final implementation.
Abstract: In this paper, we are presenting the basic methodology to be used in the design of a digital system, based on the use of hardware description languages. The most important stages of the design flow and the computer-aided design tools involved are presented, from the initial specification to the final implementation. The design flow described in the paper is based on a top-down approach, as this is the methodology currently used for most of the digital systems to face the current system complexity. Although all the concepts and methods are feasible for any kind of digital electronic system, application-specific integrated circuits are, in particular, considered as an application example in the paper. Most of the examples shown are written in VHSIC HDL, as it is an IEEE Standard and is one of the most commonly used.

92 citations

Journal ArticleDOI
01 May 2019
TL;DR: The structure of the Internet of Things is presented and the extreme edge is detailed, presenting the implementation options and requirements, with the purpose of having a better understanding of the needs when a specific application has to been developed and a set of devices has to be deployed.
Abstract: The Internet of Things is being established nowadays, and the deployment of devices to be interconnected with each other and to the Internet is becoming a more common issue. The Internet of Things is structured in several levels and, in this regard, depending on the layer in which these devices are located, the complexity range and specific constraints arise. In the lowest level of this structure, the so-called edge is found, where the data are gathered from the environment by tiny electronic devices which are very limited in energy, computing, and memory resources. These devices, in turn, present different levels of complexity, which lead to a distinction between the edge layer and the sensor or extreme edge layer. In the extreme edge is where the most essential and limited tasks are carried out, these are sensing and sending data. Meanwhile on the edge, in addition to sensing, some processing can be performed in order to offload upper layers and to save precious energy by not communicating useless data. In this review paper, the structure of the Internet of Things is presented and the extreme edge is detailed, presenting the implementation options and requirements, with the purpose of having a better understanding of the needs when a specific application has to be developed and a set of devices has to be deployed. A special emphasis receives the bottom layer, focusing on devices oriented to last unattended for tens of years.

86 citations

Journal Article
TL;DR: A modular architecture for the sensor network node is proposed, composed of four layers: communication, processing, power supply and sensing, to minimize the redesign effort as well as to make the node flexible and adaptable to many different applications.
Abstract: The growth of sensor networks during the last years is a fact and within this field, wireless sensor networks are growing particularly as there are many applications that demand the use of many nodes, even hundreds or thousands. More and more applications are emerging to solve several problems in data acquisition and control in different environments, taking advantage of this technology. In this context, hardware design of the sensor network node becomes critical to satisfy the hard constraints imposed by wireless sensor networks, like low power consumption, low size and low cost. Moreover, these nodes must be capable of sensing, processing and communicating physical parameters, becoming true smart sensors in a network. With this goal in mind, we propose a modular architecture for the nodes, composed of four layers: communication, processing, power supply and sensing. The purpose is to minimize the redesign effort as well as to make the node flexible and adaptable to many different applications. In a first prototype of the node, we present a node with a mixed design based on a microcontroller and an FPGA for the processing layer and Bluetooth technology for communications.

82 citations


Cited by
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[...]

08 Dec 2001-BMJ
TL;DR: There is, I think, something ethereal about i —the square root of minus one, which seems an odd beast at that time—an intruder hovering on the edge of reality.
Abstract: There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality. Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

33,785 citations

Journal ArticleDOI
TL;DR: This paper reviews the state of the art of field- programmable gate array (FPGA) design methodologies with a focus on industrial control system applications and presents three main design rules, algorithm refinement, modularity, and systematic search for the best compromise between the control performance and the architectural constraints.
Abstract: This paper reviews the state of the art of field- programmable gate array (FPGA) design methodologies with a focus on industrial control system applications. This paper starts with an overview of FPGA technology development, followed by a presentation of design methodologies, development tools and relevant CAD environments, including the use of portable hardware description languages and system level programming/design tools. They enable a holistic functional approach with the major advantage of setting up a unique modeling and evaluation environment for complete industrial electronics systems. Three main design rules are then presented. These are algorithm refinement, modularity, and systematic search for the best compromise between the control performance and the architectural constraints. An overview of contributions and limits of FPGAs is also given, followed by a short survey of FPGA-based intelligent controllers for modern industrial systems. Finally, two complete and timely case studies are presented to illustrate the benefits of an FPGA implementation when using the proposed system modeling and design methodology. These consist of the direct torque control for induction motor drives and the control of a diesel-driven synchronous stand-alone generator with the help of fuzzy logic.

882 citations

Posted Content
TL;DR: An exhaustive review of the research conducted in neuromorphic computing since the inception of the term is provided to motivate further work by illuminating gaps in the field where new research is needed.
Abstract: Neuromorphic computing has come to refer to a variety of brain-inspired computers, devices, and models that contrast the pervasive von Neumann computer architecture This biologically inspired approach has created highly connected synthetic neurons and synapses that can be used to model neuroscience theories as well as solve challenging machine learning problems The promise of the technology is to create a brain-like ability to learn and adapt, but the technical challenges are significant, starting with an accurate neuroscience model of how the brain works, to finding materials and engineering breakthroughs to build devices to support these models, to creating a programming framework so the systems can learn, to creating applications with brain-like capabilities In this work, we provide a comprehensive survey of the research and motivations for neuromorphic computing over its history We begin with a 35-year review of the motivations and drivers of neuromorphic computing, then look at the major research areas of the field, which we define as neuro-inspired models, algorithms and learning approaches, hardware and devices, supporting systems, and finally applications We conclude with a broad discussion on the major research topics that need to be addressed in the coming years to see the promise of neuromorphic computing fulfilled The goals of this work are to provide an exhaustive review of the research conducted in neuromorphic computing since the inception of the term, and to motivate further work by illuminating gaps in the field where new research is needed

570 citations

Journal ArticleDOI
TL;DR: This book is mainly oriented towards a final year undergraduate course on fault-tolerant computing, primarily with an implementation bias, and draws considerably on the author's experience in industry, particularly reflected in the projects accompanying chapter 5.
Abstract: Design and Analysis ofFault-Tolerant Digital Systems: B. W. JOHNSON (Addison Wesley, 1989,577 pp., £41.35) The book provides an introduction to the important aspects of designing fault-tolerant systems, and an evaluation of how well the reliability goals have been achieved. The book is mainly oriented towards a final year undergraduate course on fault-tolerant computing, primarily with an implementation bias. In chapters 1 and 2, definitions and basic terminology are covered, which sets the stage for the remaining chapters, and provides the background and motivation for the remainder of the book. Chapter 3 provides a thorough analysis of fault-tolerance techniques and concepts. This chapter in particular is remarkably well written, covering the issues of hardware and information redundancy, which form the mainstay offault-tolerant computing. Subsequent chapters on the use and evaluation of the various approaches illustrate the principles as they have been put into practice. At the end of chapter 5, small projects that allow the reader to apply the material presented in the preceding chapters are included. The resurgence of interest in fault-tolerance with the emergence of VLSI is the theme of chapter 6, focussing on designing fault-tolerant systems in a VLSI environment. The problems and opportunities presented by VLSI are discussed and the use of redundancy techniques in order to enhance manufacturing yield and to provide in-service reliability are reviewed. The final chapter covers testing, design for testability and testability analysis, which must be considered during each phase of the design process to guarantee that resulting designs can be thoroughly tested. Each chapter is followed by a summary of the key issues and concepts presented therein, and a separate list of references, which makes it easily readable. In addition, there is a reading list with more comprehensive and specialised references devoted to each chapter. Overall, the book is well written, and contains a great deal of information in 577 pages. The book has a definite implementation bias, and draws considerably on the author's experience in industry, particularly reflected in the projects accompanying chapter 5. The book should be a useful addition to a library, and a suitable text to accompany a lecture course on fault-tolerant computing. R. RAMASWAMI, Department ofComputation, UMIST

444 citations