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Tetsu Tanaka

Researcher at Tohoku University

Publications -  423
Citations -  11239

Tetsu Tanaka is an academic researcher from Tohoku University. The author has contributed to research in topics: Wafer & Chip. The author has an hindex of 38, co-authored 406 publications receiving 10375 citations. Previous affiliations of Tetsu Tanaka include NTT DoCoMo & Tokyo Medical and Dental University.

Papers
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Proceedings ArticleDOI

Highly efficient TSV repair technology for resilient 3-D stacked multicore processor system

TL;DR: The processor chip for the resilient 3-D stacked multicore processor has been designed and fabricated with highly area-efficient TSV repair technology.
Journal ArticleDOI

Significant Die-Shift Reduction and μ LED Integration Based on Die-First Fan-Out Wafer-Level Packaging for Flexible Hybrid Electronics

TL;DR: In this paper, an on-nail photoplethysmogram (PPG) sensor module is integrated with a polydimethylsiloxane (PDMS) mold resin for real-time monitoring pulse wave and percutaneous oxygen saturation (SpO2).
Proceedings ArticleDOI

Development of a new self-assembled die bonder to three-dimensionally stack known good dies in batch

TL;DR: A new self-assembled die bonder to produce three-dimensionally integrated circuit (3D IC) using a multichip-to-wafer bonding method in batch and the average alignment accuracy was found to be approximately 400 nm and the total alignment time was less than 0.1 sec.