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Author

Tetsu Tanaka

Other affiliations: NTT DoCoMo, Tokyo Medical and Dental University, Fujitsu  ...read more
Bio: Tetsu Tanaka is an academic researcher from Tohoku University. The author has contributed to research in topics: Wafer & Chip. The author has an hindex of 38, co-authored 406 publications receiving 10375 citations. Previous affiliations of Tetsu Tanaka include NTT DoCoMo & Tokyo Medical and Dental University.
Topics: Wafer, Chip, Wafer bonding, Interposer, Flip chip


Papers
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Proceedings ArticleDOI
01 Oct 2012
TL;DR: In this paper, a new 3D integration technology and heterogeneous integration technology called a super-chip integration is described, where a number of known good dies (KGDs) with different sizes and different devices are simultaneously aligned and bonded onto lower chips or wafer by a chip self-assembly method using the surface tension of liquid in the super chip integration.
Abstract: A new 3-D integration technology and heterogeneous integration technology called a super-chip integration is described. A number of known good dies (KGDs) with different sizes and different devices are simultaneously aligned and bonded onto lower chips or wafer by a chip self-assembly method using the surface tension of liquid in the super-chip integration. Possibilities for new system-on-a chip and heterogeneous LSIs by 3D super-chip integration such as 3D stacked multicore processor with self-test and self-repair function, GPU stacked 3D image sensor with extremely fast processing speed and 3D stacked reconfigurable processor with spin memory are discussed.

2 citations

Proceedings ArticleDOI
01 Oct 2019
TL;DR: A new 3D-IC embedded flexible hybrid system based on a Fan-Out Wafer-Level Packaging (FOWLP) that can be expected to be used as high-performance wearable device systems for biomedical applications.
Abstract: We have fabricated a new 3D-IC embedded flexible hybrid system (FHS) based on a Fan-Out Wafer-Level Packaging (FOWLP). The unique FHS structure is consisting of PDMS as a flexible substrate in which the 3D-IC with through-Si vias (TSVs) and microbumps are embedded. The mechanical and electrical properties of the 3D-IC embedded FHS are characterized by using repeated bending test with the TSV/microbump daisy chains. The new FHS can be expected to be used as high-performance wearable device systems for biomedical applications.

2 citations

Proceedings ArticleDOI
05 Dec 1999
TL;DR: In this paper, a compact method of quantum-mechanical correction for MOS device models is proposed and demonstrated, which can simulate n-and p-MOS capacitances at any gate voltage with the same accuracy as solving the Schrodinger equation.
Abstract: A compact method of quantum-mechanical correction for MOS device models is proposed and demonstrated In this method, carrier depletion at a MOS interface due to quantum effect is modeled with a classical carrier profile multiplied by a proper factor which is determined uniquely from material parameters of the MOS device It can simulate n- and p-MOS capacitances at any gate voltage with the same accuracy as solving the Schrodinger equation We further developed a compact formula of tunneling current A combination of these two methods can simulate well experimental data and is widely applicable to conventional simulators

2 citations

Proceedings ArticleDOI
20 Apr 2016
TL;DR: In this paper, through-Si-Vias with a diameter of 5-15 µm were formed by masking the via patterns on the SiO2 surface of the back-ground side of 30-50 µm-thick LSI wafer that was temporarily bonded to the support glass, followed by selective deep-reactive-ion-etching of Si, Si, and bottom SiO 2, and subsequently barrier and seed layers deposition and via filling.
Abstract: Back-via three-dimensional (3D) integration using multiple thin-wafer transfer processes has been developed at GINTI, Tohoku University, where visible laser was employed for wafer debonding. The potential advantages of laser debonding are (i) the realization of ultra-thin wafer releasing with less stress as compared to the conventional thermal and chemical debonding methods, and (ii) no adhesive residues were left on the thinned wafer surface owing to their excellent solubility in solvents. The edge-trimming width and depth for Si before temporary bonding and the temporary bonding parameters using thermo-plastic adhesives were carefully investigated and optimized, in order to avoid any undesirable effects in background thin wafers. Through-Si-Vias with a diameter of 5–15 µm were formed by masking the via patterns (using i-line, back-side-alignment) on the SiO2 surface of the back-ground side of 30 – 50 µm-thick LSI wafer that was temporarily bonded to the support glass, followed by selective deep-reactive-ion-etching of SiO2, Si, and bottom SiO2, and subsequently barrier and seed layers deposition and via filling. Using laser debonding technique, the thinned Si wafers with Cu-vias were transferred to the other glass with different temporary adhesive. The observed low resistance values from the I–V data for 5000 Cu-via daisy chain reveals that the proposed back-via 3D integration using laser debonding is now ready for industrial use.

2 citations

Book ChapterDOI
17 Apr 2018
TL;DR: A new 3D heterogeneous integration technology called a super-chip technology using self-assembly and electrostatic (SAE) bonding method for stacking various kinds of chips with different chip size and chip thickness which are fabricated using different process technologies.
Abstract: Introduction Three-dimensional (3D) LSIs using TSVs are indispensable to achieve high performance and low power LSIs with smaller form factor. A wafer-to-wafer (WtW) technology is suitable for stacking chips with high production yield such as DRAM since the overall yield after stacking rapidly decreases as the number of stacking layers increases. The chipto-wafer (CtW) is suitable for stacking known good dies (KGDs). In addition, chips with different size which are fabricated using different process technologies can be stacked in the CtW technology. The inherent problem in the CtW technology, however, is low production throughput. To solve these problems, we have proposed a new 3D heterogeneous integration technology called a super-chip technology using self-assembly and electrostatic (SAE) bonding method [4]. Heterogeneous Integration and 3D Superchip Super-chip technology makes possible to merge different kinds of technologies such as packaging, MEMS, photonics and so on as shown in Fig.1. A new self-assembly and electrostatic (SAE) bonding method is employed in this super-chip technology for stacking various kinds of chips with different chip size and chip thickness which are fabricated using different process technologies. A number of chips are simultaneously aligned and bonded with high alignment accuracy of less than 0.5μm by making use of the surface tension of liquid and electrostatic force. SAE (Self-Assembly and Electrostatic) Bonding KGDs are directly carried from a tested wafer to an electrostatic multichip carrier (e-carrier), and then are released onto water droplets provided on hydrophilic bonding regions formed on the e-carrier. Thus many KGDs are precisely self-assembled on the e-carrier. After self-assembly, the KGDs are temporarily bonded to the ecarrier by electrical charging with high DC voltage. Then, the e-carrier with the KGDs is aligned and temporarily bonded to the corresponding support wafer on which a temporary adhesive is coated . In a multichip-to-wafer (MCtW) technology using Self-Assembly and Electrostatic (SAE) bonding, the temporarily bonded many KGDs are readily debonded from the e-carrier and transferred to the support wafer by discharging the voltage. The subsequent processes are resin molding, multichip thinning, TSV/microbump formation, and second multichip transfer from the support wafer to the corresponding target LSI wafer. The temporary adhesive used in this process has high thermal stability whereas glued chips can be easily removed from the support wafer after TSV formation. By repeating the sequence, we can obtain 3D stacked thin chips with TSVs. Fabrication of Heterogeneous 3D LSI We have been developing various kinds of heterogeneous 3D LSIs using 3D super-chip technology. A 3Dstacked image sensor chip is one example of these heterogeneous 3D LSIs. Our 3D-stacked image sensor chip is composed of CMOS image sensor (CIS) layer, correlated double sampling circuit (CDS) layer, and analogto-digital converter (ADC) array layer. One image frame with 320×240 pixels is divided into 20×15 image processing blocks. Each block is composed of 256 CIS pixel circuits, one CDS circuit, and one ADC circuit which are electrically connected TSVs. The CIS chip was fabricated using 0.18μm front-side illumination CMOS image sensor technology. Each pixel is designed with 10μm×10μm size and one image processing block has 255 pixels and one Cu TSV with the diameter of 5μm. The CDS chip and ADC chip were fabricated using 0.18μm CMOS technology and 90-nm CMOS technology, respectively. Each chip has 5×5mm 2 size. We stacked these chips by a novel chip-based heterogeneous integration technology. The comercially available 2D chips are processed and integrated in chip-level. First of all, before stacking three kinds of chips, Cu/Sn microbumps are formed on the surface of each chip. Each functional chip with Cu/Sn microbumps is glue-bonded temporally to a supporting glass substrate and thinned down to 40μm thickness. Via holes with 5μm dia. are etched from the backside of Si substrate. The dielectric liner at the bottom of hole is etched by dry etching. Then holes are filled with Cu by elctroplating. Next Cu and Sn electroplating are used to form backside Cu/Sn microbumps. By repeating these processes, we fabricated 3D-stacked image sensor. The bird's-eye view and crosssectional image of the fabricated 3D-stacked image sensor are shown in Figs. 2 and 3 . We have confirmed basic function of this 3D-stacked image sensor chip.

2 citations


Cited by
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Journal ArticleDOI
11 Jun 1998-Nature
TL;DR: The complete genome sequence of the best-characterized strain of Mycobacterium tuberculosis, H37Rv, has been determined and analysed in order to improve the understanding of the biology of this slow-growing pathogen and to help the conception of new prophylactic and therapeutic interventions.
Abstract: Countless millions of people have died from tuberculosis, a chronic infectious disease caused by the tubercle bacillus. The complete genome sequence of the best-characterized strain of Mycobacterium tuberculosis, H37Rv, has been determined and analysed in order to improve our understanding of the biology of this slow-growing pathogen and to help the conception of new prophylactic and therapeutic interventions. The genome comprises 4,411,529 base pairs, contains around 4,000 genes, and has a very high guanine + cytosine content that is reflected in the biased amino-acid content of the proteins. M. tuberculosis differs radically from other bacteria in that a very large portion of its coding capacity is devoted to the production of enzymes involved in lipogenesis and lipolysis, and to two new families of glycine-rich proteins with a repetitive structure that may represent a source of antigenic variation.

7,779 citations

Journal ArticleDOI
TL;DR: Antiinflammatory therapy targeting the interleukin‐1β innate immunity pathway with canakinumab at a dose of 150 mg every 3 months led to a significantly lower rate of recurrent cardiovascular events than placebo, independent of lipid‐level lowering.
Abstract: BackgroundExperimental and clinical data suggest that reducing inflammation without affecting lipid levels may reduce the risk of cardiovascular disease. Yet, the inflammatory hypothesis of atherothrombosis has remained unproved. MethodsWe conducted a randomized, double-blind trial of canakinumab, a therapeutic monoclonal antibody targeting interleukin-1β, involving 10,061 patients with previous myocardial infarction and a high-sensitivity C-reactive protein level of 2 mg or more per liter. The trial compared three doses of canakinumab (50 mg, 150 mg, and 300 mg, administered subcutaneously every 3 months) with placebo. The primary efficacy end point was nonfatal myocardial infarction, nonfatal stroke, or cardiovascular death. ResultsAt 48 months, the median reduction from baseline in the high-sensitivity C-reactive protein level was 26 percentage points greater in the group that received the 50-mg dose of canakinumab, 37 percentage points greater in the 150-mg group, and 41 percentage points greater in t...

5,660 citations

Journal ArticleDOI
31 Aug 2000-Nature
TL;DR: It is proposed that the size and complexity of the P. aeruginosa genome reflect an evolutionary adaptation permitting it to thrive in diverse environments and resist the effects of a variety of antimicrobial substances.
Abstract: Pseudomonas aeruginosa is a ubiquitous environmental bacterium that is one of the top three causes of opportunistic human infections. A major factor in its prominence as a pathogen is its intrinsic resistance to antibiotics and disinfectants. Here we report the complete sequence of P. aeruginosa strain PAO1. At 6.3 million base pairs, this is the largest bacterial genome sequenced, and the sequence provides insights into the basis of the versatility and intrinsic drug resistance of P. aeruginosa. Consistent with its larger genome size and environmental adaptability, P. aeruginosa contains the highest proportion of regulatory genes observed for a bacterial genome and a large number of genes involved in the catabolism, transport and efflux of organic compounds as well as four potential chemotaxis systems. We propose that the size and complexity of the P. aeruginosa genome reflect an evolutionary adaptation permitting it to thrive in diverse environments and resist the effects of a variety of antimicrobial substances.

4,220 citations