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Thomas Brunschwiler

Bio: Thomas Brunschwiler is an academic researcher from IBM. The author has contributed to research in topics: Computer cooling & Heat transfer. The author has an hindex of 20, co-authored 36 publications receiving 1982 citations.

Papers
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Proceedings ArticleDOI
07 Nov 2010
TL;DR: 3D-ICE, a compact transient thermal model (CTTM) for the thermal simulation of 3D ICs with multiple inter-tier microchannel liquid cooling, is presented, which offers significant speed-up over a typical commercial computational fluid dynamics simulation tool while preserving accuracy.
Abstract: Three dimensional stacked integrated circuits (3D ICs) are extremely attractive for overcoming the barriers in interconnect scaling, offering an opportunity to continue the CMOS performance trends for the next decade. However, from a thermal perspective, vertical integration of high-performance ICs in the form of 3D stacks is highly demanding since the effective areal heat dissipation increases with number of dies (with hotspot heat fluxes up to 250W/cm2) generating high chip temperatures. In this context, inter-tier integrated microchannel cooling is a promising and scalable solution for high heat flux removal. A robust design of a 3D IC and its subsequent thermal management depend heavily upon accurate modeling of the effects of liquid cooling on the thermal behavior of the IC during the early stages of design. In this paper we present 3D-ICE, a compact transient thermal model (CTTM) for the thermal simulation of 3D ICs with multiple inter-tier microchannel liquid cooling. The proposed model is compatible with existing thermal CAD tools for ICs, and offers significant speed-up (up to 975x) over a typical commercial computational fluid dynamics simulation tool while preserving accuracy (i.e., maximum temperature error of 3.4%). In addition, a thermal simulator has been built based on 3D-ICE, which is capable of running in parallel on multicore architectures, offering further savings in simulation time and demonstrating efficient parallelization of the proposed approach.

296 citations

Journal ArticleDOI
TL;DR: In this paper, the heat-removal capability of area-interconnect-compatible interlayer cooling in vertically integrated, high-performance chip stacks was characterized with de-ionized water as coolant.
Abstract: The heat-removal capability of area-interconnect-compatible interlayer cooling in vertically integrated, high-performance chip stacks was characterized with de-ionized water as coolant. Correlation-based predictions and computational fluid dynamic modeling of cross-flow heat-removal structures show that the coolant temperature increase due to sensible heat absorption limits the cooling performance at hydraulic diameters ≤200 μm. An experimental investigation with uniform and double-side heat flux at Reynolds numbers ≤1,000 and heat transfer areas of 1 cm2 was carried out to identify the most efficient interlayer heat-removal structure. The following structures were tested: parallel plate, microchannel, pin fin, and their combinations with pins using in-line and staggered configurations with round and drop-like shapes at pitches ranging from 50 to 200 μm and fluid structure heights of 100–200 μm. A hydrodynamic flow regime transition responsible for a local junction temperature minimum was observed for pin fin in-line structures. The experimental data was extrapolated to predict maximal heat flux in chip stacks having a 4-cm2 heat transfer area. The performance of interlayer cooling strongly depends on this parameter, and drops from >200 W/cm2 at 1 cm2 and >50 μm interconnect pitch to <100 W/cm2 at 4 cm2. From experimental data, friction factor and Nusselt number correlations were derived for pin fin in-line and staggered structures.

161 citations

Journal ArticleDOI
TL;DR: In this article, the authors present a novel liquid-cooling concept, for targeted, energy efficient cooling of hotspots through passively optimized microchannel structures etched into the backside of a chip.

159 citations

Proceedings ArticleDOI
28 May 2008
TL;DR: In this article, the heat removal capability of area-interconnect-compatible interlayer cooling in vertically integrated, high-performance chip stacks was characterized with de-ionized water as coolant.
Abstract: The heat removal capability of area-interconnect-compatible interlayer cooling in vertically integrated, high-performance chip stacks was characterized with de-ionized water as coolant. Correlation-based predictions and computational fluid dynamic modeling of cross-flow heat-removal structures show that the coolant temperature increase due to sensible heat absorption limits the cooling performance at hydraulic diameters les 200 mum. An experimental investigation with uniform and double-side heat flux at Reynolds numbers les 1000 and heat transfer areas of 1 cm2 was carried out to identify the most efficient interlayer heat-removal structure. Parallel plate, microchannel, pin fin, and their combinations with pins using in-line and staggered configurations with round and drop-like shapes at pitches ranging from 50 to 200 mum and fluid structure heights of 100 to 200 mum were tested. A hydrodynamic flow regime transition responsible for a local junction temperature minimum was observed for pin fin inline structures. The experimental data was extrapolated to predict maximal heat flux in chip stacks with a 4-cm2 heat transfer area. The performance of interlayer cooling strongly depends on this parameter, and drops from >200 W/cm2 at 1 cm2 and >50 mum interconnect pitch to <100 W/cm2 at 4 cm2.

145 citations

Journal ArticleDOI
TL;DR: In this article, an experimental investigation of a novel, high performance ultrathin manifold microchannel heat sink is presented, which consists of impinging liquid slot-jets on a structured surface fed with liquid coolant by an overlying two-dimensional manifold.
Abstract: We report an experimental investigation of a novel, high performance ultrathin manifold microchannel heat sink. The heat sink consists of impinging liquid slot-jets on a structured surface fed with liquid coolant by an overlying two-dimensional manifold. We developed a fabrication and packaging procedure to manufacture prototypes by means of standard microprocessing. A closed fluid loop for precise hydrodynamic and thermal characterization of six different test vehicles was built. We studied the influence of the number of manifold systems, the width of the heat transfer microchannels, the volumetric flow rate, and the pumping power on the hydrodynamic and thermal performance of the heat sink. A design with 12.5 manifold systems and 25 μm wide microchannels as the heat transfer structure provided the optimum choice of design parameters. For a volumetric flow rate of 1.3 l/min we demonstrated a total thermal resistance between the maximum heater temperature and fluid inlet temperature of 0.09 cm 2 K/W with a pressure drop of 0.22 bar on a 2 ×2 cm 2 chip. This allows for cooling power densities of more than 700 W/cm 2 for a maximum temperature difference between the chip and the fluid inlet of 65 K. The total height of the heat sink did not exceed 2 mm, and includes a 500 μm thick thermal test chip structured by 300 μm deep microchannels for heat transfer. Furthermore, we discuss the influence of elevated fluid inlet temperatures, allowing possible reuse of the thermal energy, and demonstrate an enhancement of the heat sink cooling efficiency of more than 40% for a temperature rise of 50 K.

134 citations


Cited by
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Patent
01 Aug 2008
TL;DR: In this article, the oxide semiconductor film has at least a crystallized region in a channel region, which is defined as a region of interest (ROI) for a semiconductor device.
Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

1,501 citations

Patent
18 Jun 2010
TL;DR: An interactive television program guide system is provided in this article, which provides users with an opportunity to select programs for recording on a remote media server and to designate gift recipients for whom programs may be recorded.
Abstract: An interactive television program guide system is provided. An interactive television program guide provides users with an opportunity to select programs for recording on a remote media server. Programs may also be recorded on a local media server. The program guide provides users with VCR-like control over programs that are played back from the media servers and over real-time cached copies of the programs. The program guide also provides users with an opportunity to designate gift recipients for whom programs may be recorded.

1,316 citations

Journal ArticleDOI
K. Aamodt1, N. Abel2, A. Abrahantes Quintana, A. Acero  +989 moreInstitutions (76)
TL;DR: In this paper, the production of mesons containing strange quarks (KS, φ) and both singly and doubly strange baryons (,, and − + +) are measured at mid-rapidity in pp collisions at √ s = 0.9 TeV with the ALICE experiment at the LHC.

1,176 citations

Journal ArticleDOI
TL;DR: In this article, the authors investigated the effects of nanofluids on the performance of solar collectors and solar water heaters from the efficiency, economic and environmental considerations viewpoints, and made some suggestions to use the nanoparticles in different solar thermal systems such as photovoltaic/thermal systems, solar ponds, solar thermoelectric cells, and so on.

1,069 citations

Journal Article
TL;DR: The International Nanofluid Property Benchmark Exercise (INPBE) as discussed by the authors was held in 1998, where the thermal conductivity of identical samples of colloidally stable dispersions of nanoparticles or "nanofluids" was measured by over 30 organizations worldwide, using a variety of experimental approaches, including the transient hot wire method, steady state methods, and optical methods.
Abstract: This article reports on the International Nanofluid Property Benchmark Exercise, or INPBE, in which the thermal conductivity of identical samples of colloidally stable dispersions of nanoparticles or “nanofluids,” was measured by over 30 organizations worldwide, using a variety of experimental approaches, including the transient hot wire method, steady-state methods, and optical methods. The nanofluids tested in the exercise were comprised of aqueous and nonaqueous basefluids, metal and metal oxide particles, near-spherical and elongated particles, at low and high particle concentrations. The data analysis reveals that the data from most organizations lie within a relatively narrow band (±10% or less) about the sample average with only few outliers. The thermal conductivity of the nanofluids was found to increase with particle concentration and aspect ratio, as expected from classical theory. There are (small) systematic differences in the absolute values of the nanofluid thermal conductivity among the various experimental approaches; however, such differences tend to disappear when the data are normalized to the measured thermal conductivity of the basefluid. The effective medium theory developed for dispersed particles by Maxwell in 1881 and recently generalized by Nan et al. [J. Appl. Phys. 81, 6692 (1997)], was found to be in good agreement with the experimental data, suggesting that no anomalous enhancement of thermal conductivity was achieved in the nanofluids tested in this exercise.

881 citations