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Thomas H. Lee

Other affiliations: Advanced Micro Devices
Bio: Thomas H. Lee is an academic researcher from Stanford University. The author has contributed to research in topics: CMOS & Amplifier. The author has an hindex of 62, co-authored 202 publications receiving 26446 citations. Previous affiliations of Thomas H. Lee include Advanced Micro Devices.


Papers
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Journal Article
TL;DR: This expanded and thoroughly revised edition of Thomas H. Lee's acclaimed guide to the design of gigahertz RF integrated circuits features a completely new chapter on the principles of wireless systems.
Abstract: 53 ■ IEEE CIRCUITS & DEVICES MAGAZINE ■ NOVEMBER/DECEMBER 2005 THE DESIGN OF CMOS RADIOFREQUENCY INTEGRATED CIRCUITS, 2ND ED By Thomas Lee, Cambridge University Press, 2003. All-CMOS radio transceivers and system-on-a-chip are rapidly making inroads into a wireless market that, for years, was dominated by bipolar solutions. On wireless LAN and Bluethooth, RF CMOS is especially dominant, and it is becoming also in GSM cellular and GPS receivers. Hence, books that cover this widespread domain respond to a real need. The first edition of this book, published on 1998, was a pioneering textbook on the field of RF CMOS design. This second edition is a very interesting and upgraded version that includes new material and revised topics. In particular, it now includes a chapter on the fundamentals of wireless systems. The chapter on IC components is greatly expanded and now follows that on passive RLC components. The chapter on MOS devices has been updated since it includes the understanding of the model for the shorth-channel MOS and considers and discusses the scaling trends and its impact on the next several years. It has also expanded the topic of power amplifiers; indeed, it now also covers techniques for linearization and efficiency enhancement. Low-noise amplifiers, oscillators, and phase noise are now expanded and treated with more detail. Moreover, the chapter on transceiver architectures now includes much more detail, especially on direct-conversion architecture. Finally, additional commentary on practical details on simulations, floorplanning, and packaging has been added. The first edition of this book widely covered all the main arguments needed in the CMOS design context and provided a bridge between system and circuit issues. This second edition, which is upgraded and improved, is really useful, both in the industry and academia, for the new generation of RF engineers. Indeed, it is suited for students taking courses on RF design and is a valuable reference for practicing engineers. Of course, the arguments treated in the textbook lead up to low-frequency analog design IC topics. Hence, readers have to be intimately familiar with that subject. The book is divided into 20 chapters: 1) A Nonlinear History of Radio 2) Overview of Wireless Principles 3) Passive RLC Networks 4) Characteristics of Passive IC Components 5) A Review of MOS Device Physics; 6) Distributed Systems 7) The Smith Chart and S-Parameters 8) Bandwidth Estimation Techniques 9) High-Frequency Amplifier Design 10) Voltage References and Biasing 11) Noise 12) LNA Design 13) Mixers 14) Feedback Amplifiers 15) RF Power Amplifiers 16) Phase Locked Loop 17) Oscillators and Synthesizers 18) Phase Noise 19) Architectures 20) RF Circuits Through the Ages. Moreover, it contains over 100 circuit diagrams and many homework problems. Gaetano Palumbo

3,949 citations

Book
05 Jun 2012
TL;DR: In this article, the authors present an expanded and thoroughly revised edition of Tom Lee's acclaimed guide to the design of gigahertz RF integrated circuits, which is packed with physical insights and design tips, and includes a historical overview of the field in context.
Abstract: This book, first published in 2004, is an expanded and thoroughly revised edition of Tom Lee's acclaimed guide to the design of gigahertz RF integrated circuits. A new chapter on the principles of wireless systems provides a bridge between system and circuit issues. The chapters on low-noise amplifiers, oscillators and phase noise have been significantly expanded. The chapter on architectures now contains several examples of complete chip designs, including a GPS receiver and a wireless LAN transceiver, that bring together the theoretical and practical elements involved in producing a prototype chip. Every section has been revised and updated with findings in the field and the book is packed with physical insights and design tips, and includes a historical overview that sets the whole field in context. With hundreds of circuit diagrams and homework problems this is an ideal textbook for students taking courses on RF design and a valuable reference for practising engineers.

2,909 citations

Journal ArticleDOI
TL;DR: In this paper, a general model is introduced which is capable of making accurate, quantitative predictions about the phase noise of different types of electrical oscillators by acknowledging the true periodically time-varying nature of all oscillators.
Abstract: A general model is introduced which is capable of making accurate, quantitative predictions about the phase noise of different types of electrical oscillators by acknowledging the true periodically time-varying nature of all oscillators. This new approach also elucidates several previously unknown design criteria for reducing close-in phase noise by identifying the mechanisms by which intrinsic device noise and external noise sources contribute to the total phase noise. In particular, it explains the details of how 1/f noise in a device upconverts into close-in phase noise and identifies methods to suppress this upconversion. The theory also naturally accommodates cyclostationary noise sources, leading to additional important design insights. The model reduces to previously available phase noise models as special cases. Excellent agreement among theory, simulations, and measurements is observed.

2,270 citations

Journal ArticleDOI
TL;DR: In this paper, the authors present simple and accurate expressions for the DC inductance of square, hexagonal, octagonal, and circular spiral inductors, and evaluate the accuracy of their expressions, as well as several previously published inductance expressions, in two ways: by comparison with three-dimensional field solver predictions and by contrast with their own measurements, and also previously published measurements.
Abstract: We present several new simple and accurate expressions for the DC inductance of square, hexagonal, octagonal, and circular spiral inductors. We evaluate the accuracy of our expressions, as well as several previously published inductance expressions, in two ways: by comparison with three-dimensional field solver predictions and by comparison with our own measurements, and also previously published measurements. Our simple expression matches the field solver inductance values typically within around 3%, about an order of magnitude better than the previously published expressions, which have typical errors ground 20% (or more). Comparison with measured values gives similar results: our expressions (and, indeed, the field solver results) match within around 5%, compared to errors of around 20% for the previously published expressions. (We believe most of the additional errors in the comparison to published measured values is due to the variety of experimental conditions under which the inductance was measured.) Our simple expressions are accurate enough for design and optimization of inductors or of circuits incorporating inductors. Indeed, since inductor tolerance is typically on the order of several percent, "more accurate" expressions are not really needed in practice.

1,498 citations

Journal ArticleDOI
TL;DR: In this article, a 1.5 GHz low noise amplifier (LNA) intended for use in a global positioning system (GPS) receiver, has been implemented in a standard 0.6/spl mu/m CMOS process.
Abstract: A 1.5-GHz low noise amplifier (LNA), intended for use in a global positioning system (GPS) receiver, has been implemented in a standard 0.6-/spl mu/m CMOS process. The amplifier provides a forward gain (S21) of 22 dB with a noise figure of only 3.5 dB while drawing 30 mW from a 1.5 V supply. In this paper, we present a detailed analysis of the LNA architecture, including a discussion on the effects of induced gate noise in MOS devices.

1,463 citations


Cited by
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Journal ArticleDOI

[...]

08 Dec 2001-BMJ
TL;DR: There is, I think, something ethereal about i —the square root of minus one, which seems an odd beast at that time—an intruder hovering on the edge of reality.
Abstract: There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality. Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

33,785 citations

28 Jul 2005
TL;DR: PfPMP1)与感染红细胞、树突状组胞以及胎盘的单个或多个受体作用,在黏附及免疫逃避中起关键的作�ly.
Abstract: 抗原变异可使得多种致病微生物易于逃避宿主免疫应答。表达在感染红细胞表面的恶性疟原虫红细胞表面蛋白1(PfPMP1)与感染红细胞、内皮细胞、树突状细胞以及胎盘的单个或多个受体作用,在黏附及免疫逃避中起关键的作用。每个单倍体基因组var基因家族编码约60种成员,通过启动转录不同的var基因变异体为抗原变异提供了分子基础。

18,940 citations

Book ChapterDOI
15 Aug 1999
TL;DR: In this paper, the authors examine specific methods for analyzing power consumption measurements to find secret keys from tamper resistant devices. And they also discuss approaches for building cryptosystems that can operate securely in existing hardware that leaks information.
Abstract: Cryptosystem designers frequently assume that secrets will be manipulated in closed, reliable computing environments. Unfortunately, actual computers and microchips leak information about the operations they process. This paper examines specific methods for analyzing power consumption measurements to find secret keys from tamper resistant devices. We also discuss approaches for building cryptosystems that can operate securely in existing hardware that leaks information.

6,757 citations

Journal ArticleDOI
TL;DR: Van Kampen as mentioned in this paper provides an extensive graduate-level introduction which is clear, cautious, interesting and readable, and could be expected to become an essential part of the library of every physical scientist concerned with problems involving fluctuations and stochastic processes.
Abstract: N G van Kampen 1981 Amsterdam: North-Holland xiv + 419 pp price Dfl 180 This is a book which, at a lower price, could be expected to become an essential part of the library of every physical scientist concerned with problems involving fluctuations and stochastic processes, as well as those who just enjoy a beautifully written book. It provides an extensive graduate-level introduction which is clear, cautious, interesting and readable.

3,647 citations

Proceedings ArticleDOI
01 May 2000
TL;DR: Wattch is presented, a framework for analyzing and optimizing microprocessor power dissipation at the architecture-level and opens up the field of power-efficient computing to a wider range of researchers by providing a power evaluation methodology within the portable and familiar SimpleScalar framework.
Abstract: Power dissipation and thermal issues are increasingly significant in modern processors. As a result, it is crucial that power/performance tradeoffs be made more visible to chip architects and even compiler writers, in addition to circuit designers. Most existing power analysis tools achieve high accuracy by calculating power estimates for designs only after layout or floorplanning are complete. In addition to being available only late in the design process, such tools are often quite slow, which compounds the difficulty of running them for a large space of design possibilities.This paper presents Wattch, a framework for analyzing and optimizing microprocessor power dissipation at the architecture-level. Wattch is 1000X or more faster than existing layout-level power tools, and yet maintains accuracy within 10% of their estimates as verified using industry tools on leading-edge designs. This paper presents several validations of Wattch's accuracy. In addition, we present three examples that demonstrate how architects or compiler writers might use Wattch to evaluate power consumption in their design process.We see Wattch as a complement to existing lower-level tools; it allows architects to explore and cull the design space early on, using faster, higher-level tools. It also opens up the field of power-efficient computing to a wider range of researchers by providing a power evaluation methodology within the portable and familiar SimpleScalar framework.

2,848 citations