Showing papers by "Timo Hämäläinen published in 1997"

Mappings of SOM and LVQ on the partial tree shape neurocomputer

Abstract: Mappings of self-organizing map (SOM) and learning vector quantization (LVQ) networks are presented for a parallel neurocomputer system called PARNEU (partial tree shape neurocomputer). The partial tree shape architecture offers many mapping possibilities at several levels of parallelism for both execution and learning mode. In this paper we present both neuron and weight parallel mapping with online updating scheme. Computational complexity and the time required in each step are considered in order to compare mappings and to find out expected performance. About 8 MCUPS can be achieved with four PUs operating at the frequency of 40 MHz.

Designing a digital neurocomputer

Abstract: In this article we discuss the flow of design for neural network hardware and go deeper into the design constraints and implementation possibilities. The performance measures and problems of different measurements are also discussed. It is noted that performance is one comparison criteria, but there are also many others, some of which are also discussed. In order to anchor the discussion to real life, the article includes a case study of our TUTNC neurocomputer. In addition, examples of commercial neural computing systems and their world wide web pages are given.

Mapping of Radial Basis Function Networks to Partial Tree Shape Parallel Neurocomputer

Abstract: Mapping of radial basis function network with a hybrid learning method is presented for a partial tree shape neurocomputer. The learning stage is divided into three separate parts, namely K-means clustering, P-nearest neighbor heuristic and weight value determination. The production mode consists of one part. The time complexity is given for each step to illustrate the mapping performance. The analysis shows that radial basis function networks allow efficient parallel implementations.