T
Timothy G. Mattson
Researcher at Intel
Publications - 95
Citations - 4700
Timothy G. Mattson is an academic researcher from Intel. The author has contributed to research in topics: Software design pattern & Software. The author has an hindex of 29, co-authored 88 publications receiving 4259 citations. Previous affiliations of Timothy G. Mattson include Indiana University & DuPont.
Papers
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Book
Patterns for parallel programming
TL;DR: This book is the first parallel programming guide written specifically to serve working software developers, not just computer scientists, and introduces a complete, highly accessible pattern language that will help any experienced developer "think parallel"-and start writing effective parallel code almost immediately.
Proceedings ArticleDOI
A 48-Core IA-32 message-passing processor with DVFS in 45nm CMOS
Jason Howard,Saurabh Dighe,Yatin Hoskote,Sriram R. Vangal,D. Finan,G. Ruhl,David Jenkins,H. Wilson,Nitin Borkar,Gerhard Schrom,Fabrice Pailet,Shailendra Jain,Tiju Jacob,Satish Yada,Sravan K. Marella,Praveen Salihundam,Vasantha Erraguntla,Michael Konow,Michael Riepen,Guido Droege,Joerg Lindemann,Matthias Gries,Thomas Apel,Kersten Henriss,Tor Lund-Larsen,Sebastian Steibl,Shekhar Borkar,Vivek De,Rob F. Van der Wijngaart,Timothy G. Mattson +29 more
TL;DR: This paper presents a prototype chip that integrates 48 Pentium™ class IA-32 cores on a 6×4 2D-mesh network of tiled core clusters with high-speed I/Os on the periphery to realize a data-center-on-a-die microprocessor architecture.
Book
OpenCL Programming Guide
TL;DR: This is the first comprehensive, authoritative, and practical guide to OpenCL 1.1 specifically for working developers and software architects and shows how OpenCL can express a wide range of parallel algorithms, and offers complete reference material on both the API and OpenCL C programming language.
Proceedings ArticleDOI
The 48-core SCC Processor: the Programmer's View
Timothy G. Mattson,Michael Riepen,Thomas Lehnig,Paul Brett,Werner Haas,Patrick Kennedy,Jason Howard,Sriram R. Vangal,Nitin Borkar,Greg Ruhl,Saurabh Dighe +10 more
TL;DR: The programmer's view of this chip is described and RCCE is described: the native message passing model created for the SCC processor, an intermediate case, sharing traits of message passing and shared memory architectures.
Journal ArticleDOI
The BigDAWG Polystore System
Jennie Duggan,Aaron J. Elmore,Michael Stonebraker,Magda Balazinska,Bill Howe,Jeremy Kepner,Samuel Madden,David Maier,Timothy G. Mattson,Stan Zdonik +9 more
TL;DR: In this paper, a new view of federated databases is presented to address the growing need for managing information that spans multiple data models. And the authors propose a polystore architecture, which is designed to unify querying over multiple models.