Tobias Bjerregaard

Bio: Tobias Bjerregaard is an academic researcher from Technical University of Denmark. The author has contributed to research in topics: Network planning and design & Network on a chip. The author has an hindex of 2, co-authored 2 publications receiving 1696 citations.

A survey of research and practices of Network-on-chip

Abstract: The scaling of microchip technologies has enabled large scale systems-on-chip (SoC). Network-on-chip (NoC) research addresses global communication in SoC, involving (i) a move from computation-centric to communication-centric design and (ii) the implementation of scalable communication structures. This survey presents a perspective on existing NoC research. We define the following abstractions: system, network adapter, network, and link to explain and structure the fundamental concepts. First, research relating to the actual network design is reviewed. Then system level design and modeling are discussed. We also evaluate performance analysis techniques. The research shows that NoC constitutes a unification of current trends of intrachip communication rather than an explicit new alternative.

A Channel Library for Asynchronous Circuit Design Supporting Mixed-Mode Modeling

Abstract: This paper presents the use of SystemC to model communication channels for asynchronous circuits at various levels of abstraction. Our channel library supports transactions through a CSP-like interface (implementing send() and receive() commands) as well as through one of many specific handshake protocols e.g. 4-phase-bundled-data push etc. Our SystemC implementation enables a seamless design flow which makes possible: (i) modeling and simulation at different and mixed levels of abstraction, and (ii) easy use of different data types and handshake protocols on different channels in the circuit being designed. The paper also illustrates the use of this design flow for several asynchronous Networks-on-Chip all the way from system level to handshake components.

A survey of research and practices of Network-on-chip

Abstract: The scaling of microchip technologies has enabled large scale systems-on-chip (SoC). Network-on-chip (NoC) research addresses global communication in SoC, involving (i) a move from computation-centric to communication-centric design and (ii) the implementation of scalable communication structures. This survey presents a perspective on existing NoC research. We define the following abstractions: system, network adapter, network, and link to explain and structure the fundamental concepts. First, research relating to the actual network design is reviewed. Then system level design and modeling are discussed. We also evaluate performance analysis techniques. The research shows that NoC constitutes a unification of current trends of intrachip communication rather than an explicit new alternative.

Visual simultaneous localization and mapping: a survey

Abstract: Visual SLAM (simultaneous localization and mapping) refers to the problem of using images, as the only source of external information, in order to establish the position of a robot, a vehicle, or a moving camera in an environment, and at the same time, construct a representation of the explored zone. SLAM is an essential task for the autonomy of a robot. Nowadays, the problem of SLAM is considered solved when range sensors such as lasers or sonar are used to built 2D maps of small static environments. However SLAM for dynamic, complex and large scale environments, using vision as the sole external sensor, is an active area of research. The computer vision techniques employed in visual SLAM, such as detection, description and matching of salient features, image recognition and retrieval, among others, are still susceptible of improvement. The objective of this article is to provide new researchers in the field of visual SLAM a brief and comprehensible review of the state-of-the-art.