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Tsung-Miau Wang

Bio: Tsung-Miau Wang is an academic researcher from National Taiwan University. The author has contributed to research in topics: Silicon & Saturation current. The author has an hindex of 3, co-authored 5 publications receiving 47 citations.

Papers
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Journal ArticleDOI
TL;DR: In this paper, a metal-oxide-semiconductor (MOS) tunneling temperature sensor was used for on-chip temperature detection, which was compatible with current CMOS technology.
Abstract: This paper examined the feasibility of applying a highly sensitive metal-oxide-semiconductor (MOS) tunneling temperature sensor, which was compatible with current CMOS technology. As the sensor was biased positively at a constant voltage, the gate current increased more than 500 times when the sensor was heated from 20/spl deg/C to 110/spl deg/C. However, when the sensor was biased at a constant-current situation, its gate voltage magnitude changed significantly with substrate temperature, with a sensitivity exceeding -2 V//spl deg/C. The improvement of temperature sensitivity in this paper is one thousand times over the sensitivity of a conventional p-n junction, i.e., namely, about -2 mV//spl deg/C. Regarding a temperature sensor array, this paper proposes a method using gate current gain, rather than absolute gate current, to eliminate the gate current discrepancy among sensors. For constant current operation, a sensitivity exceeding 10 V//spl deg/C can be obtained if the current level is suitable. Finally, this paper demonstrates a real temperature distribution for on-chip detection. With such a high temperature-sensitive sensor, accurate temperature detection can be incorporated into common CMOS circuits.

28 citations

Journal ArticleDOI
TL;DR: In this paper, the saturation current of metal-oxide-semiconductor (MOS) capacitors with added HfO2 film is shown to saturate within 0.5 V.
Abstract: In this paper, metal-oxide-semiconductor (MOS) capacitors fabricated on p-type silicon substrate with hafnium oxide (HfO2 ) film added on silicon dioxide (SiO2) were demonstrated as reliable temperature-detecting devices. The saturation current of MOS (p) capacitor with added HfO2 film is easy to saturate within 0.5 V. From 40 degC to 90degC, each increase of 10degC almost doubles the saturation current. The C-V curves show that the interface properties of Si/SiO2 and SiO2/HfO 2 are good. It was also shown that these devices are reliable even though they had been electrically stressed at various temperatures (30degC~90degC) for 15 000 s. They have the potential to be integrated into the circuits as temperature detectors in the era of ultralarge-scale-integration technology

11 citations

Journal ArticleDOI
TL;DR: In this paper, the authors studied the breakdown characteristics of metal-oxide-semiconductor (MOS) capacitors at various temperatures and found that the oxide thickness and temperature significantly affect the probability of BD.
Abstract: This work studies the breakdown (BD) characteristics of metal-oxide-semiconductor (MOS) capacitors at various temperatures. The oxide thickness and temperature significantly affect the probability of BD. BD does not easily occur in ultrathin silicon dioxide when biased in the positive substrate injection region of MOS(p). However, the BD frequency increases dramatically with the oxide thickness or the temperature. The phenomenon was explained by temperature effect. When the temperature increases, the voltage drop across the silicon dioxide increases; on the contrary, the voltage across the (deep) depletion region in the Si substrate declines. Also, the enhancement of percolation and the increase in the number of interface states result in the more severe degradation of the silicon dioxide. Also, a thicker oxide has more Dit, and so undergoes degradation more easily. Finally, the C–V characteristics of the MOS capacitor in the (deep) depletion region are also discussed in order to understand the mechanisms among temperature, thickness, and percolation effect.

7 citations

Journal ArticleDOI
TL;DR: In this article, the package strain improves the noise figure (NF) of the low-noise amplifier (LNA) and the maximum noise reduction is ~053 dB (13%) at the operating frequency of 24 GHz under the biaxial tensile strain of 0037%
Abstract: The package strain improves the noise figure (NF) of the low-noise amplifier (LNA) The maximum noise reduction is ~053 dB (13%) at the operating frequency of 24 GHz under the biaxial tensile strain of 0037% The NF reduction of the strained LNA is mainly due to the enhanced transconductance and cutoff frequency of the individual nMOSFET device under the same strain and bias conditions

3 citations

Journal ArticleDOI
TL;DR: In this article, the saturation currents of metal-oxide-semiconductor (MOS) capacitors were investigated on n-and p-type silicon substrates to investigate the generation mechanism of the saturation current.
Abstract: Rapid thermal oxidations were simultaneously performed on n- and p-type silicon substrates to investigate the saturation currents of metal-oxide-semiconductor (MOS) capacitors. For MOS capacitors on n-type Si substrates, the curves of capacitance versus gate voltage (C-V) show almost no fixed charge, no lateral nonuniformity, and little interface trap density (Dit). The mechanism of the generation of the saturation current is recombination, and was investigated by electroluminescence. Also, the saturation current decreases as the oxide becomes thicker. However, the oxidation temperature must be sufficiently high to form high-quality oxide on p-type Si substrate. Controlled by minority carrier generation, the saturation current of the MOS (p) capacitor also depends on Dit, suboxide, and bulk trap density. The saturation current increases with the thickness of the oxide. The generation mechanism of the saturation currents of MOS (p) capacitors was also investigated by observing their dependencies on tempera...

2 citations


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Book ChapterDOI
01 Jan 2003
TL;DR: In this paper, an expanded and thoroughly revised edition of Thomas H. Lee's acclaimed guide to the design of gigahertz RF integrated circuits features a completely new chapter on the principles of wireless systems.
Abstract: This expanded and thoroughly revised edition of Thomas H. Lee's acclaimed guide to the design of gigahertz RF integrated circuits features a completely new chapter on the principles of wireless systems. The chapters on low-noise amplifiers, oscillators and phase noise have been significantly expanded as well. The chapter on architectures now contains several examples of complete chip designs that bring together all the various theoretical and practical elements involved in producing a prototype chip. First Edition Hb (1998): 0-521-63061-4 First Edition Pb (1998); 0-521-63922-0

207 citations

Proceedings ArticleDOI
24 May 2009
TL;DR: A ring oscillator-based CMOS temperature sensor with nano-watt power consumption is presented for RFID applications that exploits the temperature dependence of the threshold voltage and carrier mobility of MOS transistors that affect the frequency of a ring oscillators.
Abstract: In this paper, a ring oscillator-based CMOS temperature sensor with nano-watt power consumption is presented for RFID applications. Unlike conventional temperature sensors based on bandgap reference and ADC that consume large amount of power, the proposed sensor exploits the temperature dependence of the threshold voltage and carrier mobility of MOS transistors that affect the frequency of a ring oscillator. In order to maximize the temperature sensitivity and dynamic range, a supply voltage of 0.3V is used, which allows the oscillator to operate in subthreshold, near-threshold and above threshold region under different temperature conditions. In order to handle process variation, the frequency of the oscillator can be digitally trimmed by both a capacitor bank and stacked transistors. Measured data from 0.13-µm CMOS test chips indicate that the proposed temperature sensor has a resolution of 0.4°C/LSB with a 10-bit digital output code over a temperature range of 8°C to 85°C. At 10Hz of sampling frequency, the proposed sensor consumes 95nW and occupies 0.04mm2.

78 citations

Journal ArticleDOI
TL;DR: In this paper, a postdeposition annealing was performed onto the MOD-derived CeO 2 films deposited onto n-type Si substrates at different temperatures (600, 800, and 1000°C) under the flow of argon gas.
Abstract: Cerium oxide (CeO 2 ) solution was prepared by cerium(III) acetylacetonate hydrate, methanol, and acetic acid as the starting materials via the metallorganic decomposition (MOD) method. Postdeposition annealing was performed onto the MOD-derived CeO 2 films deposited onto n-type Si substrates at different temperatures (600, 800, and 1000°C) under the flow of argon gas. A slow cooling rate was then accomplished for samples to cool down to room temperature. Four orientations [(111), (200), (220), and (311)] of CeO 2 films were revealed by X-ray diffraction analysis as well as α-Ce 2 O 3 and cerium silicate (Ce 2 Si 2 O 7 ). Epitaxial-like behavior was shown in the sample annealed at 600°C due to the (200)-oriented CeO 2 film, and the dominance of this plane ceased with the increase in annealing temperature. A negative voltage shift was observed in all of the samples, indicating that positive oxide charges were trapped in the oxide as a result of the presence of oxygen vacancies. An interface trap density was extracted from the capacitance-voltage measurement, and it was related to the current density-voltage characteristics of the investigated samples. The lowest density was perceived by the sample annealed at 1000°C due to the increment in the Ce 2 Si 2 O 7 layer, reduction in total interface trap density, and effective oxide charge.

57 citations

Journal ArticleDOI
TL;DR: In this paper, the growth rate of the HfO2 films depends on the deposition pressure (P) as P-1.75, which is explained by a diffusion model of the thermalized atoms in high-pressure sputtering.
Abstract: Hafnium oxide films were deposited by high pressure reactive sputtering using different deposition pressures and times. The composition, morphology, and optical properties of the films, together with the sputtering process growth kinetics were investigated using heavy ion elastic recoil detection analysis, Fourier transform infrared spectroscopy, ultraviolet-visible-near infrared spectroscopy, x-ray diffraction, and transmission electron microscopy. The films showed a monoclinic polycrystalline structure, with a grain size depending on the deposition pressure. All films were slightly oxygen rich with respect to stoichiometric HfO2 and presented a significant amount of hydrogen (up to 6 at. %), which is attributed to the high affinity for moisture of the HfO2 films. The absorption coefficient was fitted to the Tauc law, obtaining a band gap value of 5.54 eV. It was found that the growth rate of the HfO2 films depends on the deposition pressure (P) as P-1.75. This dependence is explained by a diffusion model of the thermalized atoms in high-pressure sputtering. Additionally, the formation of an interfacial silicon oxide layer when the films were grown on silicon was observed, with a minimum thickness for deposition pressures around 1.2 mbars. This interfacial layer was formed mainly during the initial stages of the deposition process, with only a slight increase in thickness afterwards. These results are explained by the oxidizing action of the oxygen plasma and the diffusion of oxygen radicals and hydroxyl groups through the polycrystalline HfO2 film. Finally, the dielectric properties of the HfO2/SiO2 stacks were studied by means of conductance and capacitance measurements on Al/HfO2/SiO2/Si devices as a function of gate voltage and ac frequency signal.

34 citations

Proceedings ArticleDOI
27 May 2007
TL;DR: The design of an on-chip CMOS temperature sensor based on the temperature dependent characteristics of the subthreshold current is presented, which achieves high accuracy sensing, wide temperature range, and extremely low area and power overhead.
Abstract: Thermal characterization of ICs and on-chip temperature monitoring have become key tasks in electronic engineering. In this paper, we present the design of an on-chip CMOS temperature sensor based on the temperature dependent characteristics of the subthreshold current. The proposed sensor achieves high accuracy sensing (0.56 degC maximum error), wide temperature range (25-90 degC), and extremely low area (0.010 mm2) and power overhead (18 muW). Our approach improves previous works on on-chip temperature sensors and is highly suitable for portable applications where temperature monitoring achieves great importance.

28 citations