V. Corcoles

Bio: V. Corcoles is an academic researcher from University of Alicante. The author has contributed to research in topics: Digital image processing & Digital signal processor. The author has an hindex of 1, co-authored 1 publications receiving 6 citations.

Accelerating Statistical Texture Analysis with an FPGA-DSP Hybrid Architecture

Abstract: Nowadays, most image processing systems are implemented using either MMX-optimized software libraries or, when time requirements are limited, expensive high performance DSP-based boards. In this paper we present a texture analysis co-processor concept that permits the efficient hardware implementation of statistical feature extraction, and hardware-software codesign to achieve high-performance low-cost solutions. We propose a hybrid architecture based on FPGA chips, for massive data processing, and digital signal processor (DSP) for floating-point computations. In our preliminary trials with test images, we achieved sufficient performance improvements to handle a wide range of real-time applications.

Decision Tree Based FPGA-Architecture for Texture Sea State Classification

Abstract: The target detection process in sea clutter background involves the use of different types of CFAR (Constant False Alarm Rate) algorithms. These algorithms and their parameters should be configured to obtain the maximum detection probability and minimum false alarm probability at the current sea state (Beaufort scale). This paper present an FPGA-architecture for automatic classification based on texture recognition of sea states. The sea state texture classification will allow select the appropriate CFAR algorithm and its parameters for the target detection process. The paper is centered in the hardware implementation for sea state texture classification, based on decision tree. The rules for decision tree are obtained from the analysis of the grey levels co-occurrence matrix features applied in an image of the sea state obtained in a radar scan. Results with simulated and real data are presented and discussed.

Design and Optimization of Real-Time Texture Analysis Using Sum and Difference Histograms Implemented on an FPGA

Abstract: This work presents the adequacy of a dense texture analysis algorithm based on sum and difference histograms (SDHs) into a reconfigurable architecture. A deep analysis of the SDHs algorithm helps found a significant reduction in operations, size and access memory which consequently optimize resources, memory and latency time during the implementation. Furthermore, integer arithmetic operations used by SDHs are directly compatible with the FPGA making faster and efficient the implementation. Final architecture constructs 30 dense texture feature images of 640 × 480 pixels per second. Also a performance comparison among three different texture analysis architectures highlights a better trade off in performance, latency, logic elements and memory size of our system. The optimization and the resource saving make the proposed architecture an interesting choice to solve the problem of texture analysis in real time, quite used in artificial vision, autonomous navigation and medical applications.

Reconfigurable architectures for parallel execution of image processing tasks

Abstract: Reconfigurable computers are becoming third, after general purpose processors and digital signal processors, programmable computing systems In the present paper, a new definition of parallelism adequate for fine-grain parallel systems is introduced Computing power requirements for high definition, real-time vision system are discussed A survey of reconfigurable solutions for image processing and the latest research work carried on at the AGH Laboratory of Biocybernetics are presented

An FPGA implementation for texture analysis considering the real-time requirements of vision-based systems

Abstract: This article presents an architecture based on FPGA for the calculation of texture attributes using an adequacy of the technique of sum and differences of histograms. The attributes calculated by this architecture will be used in a process of classification for identification of objects during the navigation of an autonomous robot of service. Because of that, the constraint of real-time execution plays an essential role during the architecture design. So, the architecture is designed to calculate 30 dense images with 6 different attributes of texture for 10 different displacements. Exploiting the reuse of operations in parallel on the FPGA and taking into account the requisites in the time of calculation, it is possible to use the resources in an efficient and optimised way in order to obtain an architecture with the best trade off between resources and the time of calculation. Thanks to the high performance of this architecture, it can be used in applications like medical diagnosis or target detection.

Vision multi-caméra pour la détection d'obstacles sur un robot de service: des algorithmes à un système intégré

Abstract: L'une des tâches les plus importantes en robotique mobile est la detection d'obstacles pendant les deplacements du robot. Pour resoudre cette tâche, de nombreuses approches ont ete proposees; cependant les propositions applicables dans un milieu structure, dynamique et fortement encombre du fait de la presence humaine, sont limitees. Dans ce cadre, nous presentons dans ces travaux un systeme visuel reprogrammable dedie a la detection d'obstacles. Le systeme est compose de plusieurs micro-cameras disposees autour du robot mobile et d'un systeme reprogrammable. Le nombre de micro-cameras est grand (4 dans la version courante, 8 dans la version finale) et la performance en temps reel requis dans ce contexte, ne peut pas etre satisfaite par un processeur standard. Cela rend obligatoire la conception et la mise en oeuvre d'une architecture dediee pour le traitement des images. Le parallelisme fourni par les FPGAs permet de repondre aux contraintes de performance et de minimiser l'energie et le cout unitaire du systeme. L'objectif est de construire et mettre a jour une grille d'occupation robot-centree lors de la navigation du robot. Cette operation doit etre executee a 30Hz, afin de reduire la latence entre l'acquisition des images et la detection des obstacles. La detection des zones du sol occupees est faite par l'algorithme de classification AdaBoost en utilisant un vecteur d'attributs. Les attributs utilises sont la couleur et la texture. Pour la couleur, nous utilisons l'espace de couleur CIE-Lab, car cela permet d'avoir une plus grande immunite au changement de l'eclairage. Les attributs de texture sont obtenues par une methode adaptee de la technique des histogrammes de sommes et differences. Cette adaptation reduit considerablement les ressources necessaires pour calculer les attributs de texture, tout en fournissant un modele riche de chacun des objets presents dans une scene acquise par une des micro-cameras. Chaque pixel dans l'image est classifie pour savoir s'il appartient ou pas au sol, en fonction de ces attributs couleur-texture. Une fois le pixel classe, il est projete sur le plan du sol pour enrichir la grille d'occupation courante de l'environnement. Plusieurs parametres de notre approche ont ete selectionnes afin de developper un systeme avec le meilleur compromis entre les performances et les ressources consommees. Les graphiques de performances de la classification ainsi que les ressources consommees par les architectures implantees sont presentes. Les architectures ont ete developpees en VHDL avec les outils Altera; des comparaisons sont presentees avec une approche fondee sur des outils de synthese haut-niveau (Gaut, labview...). Finalement ces architectures ont ete portees et evaluees sur un kit Stratix3 connecte a 4 cameras et embarque sur un robot mobile.