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V. E. Marsico

Bio: V. E. Marsico is an academic researcher from Alcatel-Lucent. The author has contributed to research in topics: Silicon & Exfoliation joint. The author has an hindex of 5, co-authored 7 publications receiving 415 citations.

Papers
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Journal ArticleDOI
TL;DR: In this paper, the fundamental mechanism underlying hydrogen-induced exfoliation of silicon, using a combination of spectroscopic and microscopic techniques, was investigated, and the evolution of the internal defect structure as a function of implanted hydrogen concentration and annealing temperature was studied.
Abstract: We have investigated the fundamental mechanism underlying the hydrogen-induced exfoliation of silicon, using a combination of spectroscopic and microscopic techniques. We have studied the evolution of the internal defect structure as a function of implanted hydrogen concentration and annealing temperature and found that the mechanism consists of a number of essential components in which hydrogen plays a key role. Specifically, we show that the chemical action of hydrogen leads to the formation of (100) and (111) internal surfaces above 400 °C via agglomeration of the initial defect structure. In addition, molecular hydrogen is evolved between 200 and 400 °C and subsequently traps in the microvoids bounded by the internal surfaces, resulting in the build-up of internal pressure. This, in turn, leads to the observed “blistering” of unconstrained silicon samples, or complete layer transfer for silicon wafers joined to a supporting (handle) wafer which acts as a mechanical “stiffener.”

319 citations

Journal ArticleDOI
TL;DR: In this paper, the authors present a brief overview of the practical aspects of silicon-wafer bonding and the techniques used to evaluate the interface integrity, which highlight the need for fundamental studies of the microscopic interface phenomena.

66 citations

Proceedings ArticleDOI
01 Dec 1996
TL;DR: It is found that the 3-4 monolayers of molecular water trapped at the interface at room temperature, diffuse through the oxide layer and decompose at the Si/SiO/sub 2/ interface, resulting in the formation of a highly inhomogeneous, non-stoichiometric oxide layer.
Abstract: We have undertaken extensive mechanistic studies of both hydrophilic bonding and the hydrogen-induced exfoliation of silicon We have combined a wide variety of spectroscopic techniques such as IR and Raman spectroscopies, Atomic Force and Transmission Electron Microscopies, as well as mass spectrometry, in order to definitively characterize these systems We have studied the joining and bonding of oxidized wafers as a function of oxide type/thickness, wet chemical precleaning and annealing temperature By studying thin chemical oxide layers (/spl sim/4 /spl Aring/ thick), we have found that the 3-4 monolayers of molecular water trapped at the interface at room temperature, diffuse through the oxide layer and decompose at the Si/SiO/sub 2/ interface, resulting in the formation of a highly inhomogeneous, non-stoichiometric /spl sim/6-7 /spl Aring/ of additional oxide below 400"C

6 citations

Proceedings ArticleDOI
06 Oct 1997
TL;DR: In this paper, a detailed understanding of the exfoliation mechanism involves the study of initial damage, of H-passivation of various internal structures and of the mechanical forces exerted by trapped gases as a function of hydrogen implantation dose/depth and annealing temperature.
Abstract: There has been much interest in reproducing Si exfoliation by H implantation and in understanding the mechanism leading to such a remarkably uniform shearing. We have previously demonstrated that, contrary to the initial speculation, there are in fact three distinct aspects to the process: i) the generation of damage to the crystalline material by the implantation; ii) the unique surface chemistry of hydrogen and silicon that drives the thermal evolution of this damage region and; iii) the creation of internal pressure that ultimately causes exfoliation ofthe overlying Si layer. Therefore, a detailed understanding of the exfoliation mechanism involves the study of initial damage, of H-passivation of various internal structures and of the mechanical forces exerted by trapped gases as a function of hydrogen implantation dose/depth and annealing temperature. In this work, we have used different hydrogen implantation conditions (ion energies ranging from 1 eV to 1 MeV and substrate crystallographic orientations) as well as co-implantation of a variety of other elemental species, in combination with novel spectroscopic configurations, to further explore these different mechanistic aspects.

5 citations


Cited by
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Journal ArticleDOI
TL;DR: In this article, the authors discuss methods of forming silicon-on-insulator (SOI) wafers, their physical properties, and the latest improvements in controlling the structure parameters.
Abstract: Silicon-on-insulator (SOI) wafers are precisely engineered multilayer semiconductor/dielectric structures that provide new functionality for advanced Si devices. After more than three decades of materials research and device studies, SOI wafers have entered into the mainstream of semiconductor electronics. SOI technology offers significant advantages in design, fabrication, and performance of many semiconductor circuits. It also improves prospects for extending Si devices into the nanometer region (<10 nm channel length). In this article, we discuss methods of forming SOI wafers, their physical properties, and the latest improvements in controlling the structure parameters. We also describe devices that take advantage of SOI, and consider their electrical characteristics.

772 citations

Journal ArticleDOI
TL;DR: Wafer bonding allows a new degree of freedom in design and fabrication of material combinations that previously would have been excluded because these material combinations cannot be realized by the conventional approach of epitaxial growth.
Abstract: When mirror-polished, flat, and clean wafers of almost any material are brought into contact at room temperature, they are locally attracted to each other by van der Waals forces and adhere or bond. This phenomenon is referred to as wafer bonding. The most prominent applications of wafer bonding are silicon-on-insulator (SOI) devices, silicon-based sensors and actuators, as well as optical devices. The basics of wafer-bonding technology are described, including microcleanroom approaches, prevention of interface bubbles, bonding of III-V compounds, low-temperature bonding, ultra-high vacuum bonding, thinning methods such as smart-cut procedures, and twist wafer bonding for compliant substrates. Wafer bonding allows a new degree of freedom in design and fabrication of material combinations that previously would have been excluded because these material combinations cannot be realized by the conventional approach of epitaxial growth.

658 citations

Patent
29 Sep 2000
TL;DR: In this paper, the authors propose a device integration method and integrated device, which involves the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining part of the semiconductor devices after bonding.
Abstract: A device integration method and integrated device. The method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element may include one of a substrate used for thermal spreading, impedance matching or for RF isolation, an antenna, and a matching network comprised of passive elements. A second thermal spreading substrate may be bonded to the remaining portion of the semiconductor device. Interconnections may be made through the first or second substrates. The method may also include bonding a plurality of semiconductor devices to an element, and the element may have recesses in which the semiconductor devices are disposed. A conductor array having a plurality of contact structures may be formed on an exposed surface of the semiconductor device, vias may be formed through the semiconductor device to device regions, and interconnection may be formed between said device regions and said contact structures.

354 citations

Patent
28 Apr 1998
TL;DR: In this article, the authors proposed a method for manufacturing semiconductor substrates in which a semiconductor layer for forming semiconductor device therein is formed on a supporting substrate with an insulating film interposed between, with which in forming the semiconductor layers on a substrate on which a buried pattern structure has been formed, it is possible to greatly increase the film thickness uniformity and the thickness controllability.
Abstract: Methods for manufacturing semiconductor substrates in which a semiconductor layer for forming semiconductor device therein is formed on a supporting substrate with an insulating film interposed between, with which in forming the semiconductor layer on a substrate on which a buried pattern structure has been formed it is possible to greatly increase the film thickness uniformity of the semiconductor layer and the film thickness controllability, particularly when the semiconductor layer is being formed as an extremely thin film. As a result, it is possible to achieve improved quality and characteristics of the semiconductor substrates and make possible the deployment of such semiconductor substrates to various uses.

262 citations

Patent
26 Nov 2010
TL;DR: In this paper, a method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching, which may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperature chemical bonding of materials such as silicon, silicon nitride and SiO2.
Abstract: A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperature chemical bonding of materials such as silicon, silicon nitride and SiO2. The surfaces to be bonded are polished to a high degree of smoothness and planarity. VSE may use reactive ion etching or wet etching to slightly etch the surfaces being bonded. The surface roughness and planarity are not degraded and may be enhanced by the VSE process. The etched surfaces may be rinsed in solutions such as ammonium hydroxide or ammonium fluoride to promote the formation of desired bonding species on the surfaces.

253 citations