V. Lakshmi Prabha
Other affiliations: Karunya University
Bio: V. Lakshmi Prabha is an academic researcher from Government College of Technology, Coimbatore. The author has contributed to research in topics: High-κ dielectric & Gate dielectric. The author has an hindex of 4, co-authored 13 publications receiving 30 citations. Previous affiliations of V. Lakshmi Prabha include Karunya University.
TL;DR: In this article, the structural and morphological characterization of the nanoscaled zirconium dioxide is done using FTIR, SEM, X-ray diffraction, and TEM.
Abstract: Zirconium dioxide is a prospective high-κ material that can replace silicon dioxide. Zirconium dioxide nanoparticle has been synthesized using sol-gel process at room temperature. The structural and morphological characterization of the nanoscaled zirconium dioxide is done using FTIR, SEM, X-ray diffraction, and TEM. The particle size of the synthesized ZrO2 is observed in the range of 50–80 nm with an average crystallite size of 2–10 nm. The results are compared with commercial coarse zirconia which showed a particle size in the range of 900 nm–2.13 µm and crystallite size of 5.3 nm–20 nm. It is expected that both nanoscaling and the high dielectric constant of ZrO2 would be useful in replacing the low-κ SiO2 dielectric with high-κ ZrO2 for CMOS fabrication technology. The synthesized ZrO2 is subjected to impedance analysis and it exhibited a dielectric constant of 25 to find its application in short channel devices like multiple gate FinFETS and as a suitable alternative for the conventional gate oxide dielectric SiO2 with dielectric value of 3.9, which cannot survive the challenge of an end of oxide thickness ≤ 1 nm.
TL;DR: A novel architecture for low power and low area implementation of reconfigurable Finite Impulse Response (FIR) filter based on dual mode operation in which area complexity is reduced and another mode is a testable reversible mode of operation to achieve low power.
Abstract: Modern Digital Signal Processing systems require the reconfigurable FIR filters with low complexity architectures. This paper presents a novel architecture for low power and low area implementation of reconfigurable Finite Impulse Response (FIR) filter based on dual mode operation. The proposed reconfigurable technique operates in two modes. One mode is a multiplier less implementation in which area complexity is reduced and another mode is a testable reversible mode of operation to achieve low power. Cadence Encounter synthesis results of the designed 75 taps filter architecture achieve power savings up to 37.97% and area reduction of about 44.61% over the conventional reconfigurable architectures. The performance metric MSE, PSNR and SMR values of proposed dual mode reconfigurable 75 taps FIR filters are found to be 0.62, 50.24 and 80.8506 respectively.
TL;DR: A Radio Frequency Identification (RFID) based protection scheme for Intellectual Property Protection (IPP) of Static Random Access Memory (SRAM) FPGA IP cores that overcome the limitations of existing IPP techniques is proposed.
Abstract: Field-programmable gate-array (FPGA) based hardware IP cores have emerged as an integral part of modern SOC designs. IP trading plays central role in Electronic Design Automation (EDA) industry. While the potential of IP infringement is growing fast, the global awareness of IP protection remains low. In this work, we propose a Radio Frequency Identification (RFID) based protection scheme for Intellectual Property Protection (IPP) of Static Random Access Memory (SRAM) FPGA IP cores that overcome the limitations of existing IPP techniques. Here, three types of reconfigurable RFID tags is realised in order to support the incorporation of the proposed RFID based security scheme in all the reconfigurable FPGA devices of Xilinx family. Also a special tag bypass feature is employed to increase the suitability of proposed scheme as an IPP technique for reconfigurable IP cores. The proposed scheme supports safe exchange of reconfigurable FPGA IP cores between IP providers and system developers. The results derived from the testing of hardware prototype used for the evaluation of the proposed scheme are quite encouraging and shows that the proposed security feature can be incorporated into the reconfigurable IP cores of any functionality without significant performance degradation of the reconfigurable IP cores.
••20 Mar 2013
TL;DR: In this article, a Double Gate (DG) FinFET is designed in 30nm, 60nm technology with thickness of dielectric ranging from 1.2nm to 2.5nm and the observations are studied.
Abstract: A Double Gate(DG) FinFET is designed in 30nm, 60nm technology with thickness of dielectric ranging from 1.2nm to 2.5nm and the observations are studied. Then DIBL of the device is calculated. The Double Gate(DG) FinFET is one of the promising devices to extend the CMOS technology beyond the scaling limit of conventional CMOS technology. DG FinFET has an excellent scalability and better short channel effect immunity compared to normal MOSFET device. High-k dielectric can be used in DG FinFET. While using the high-k dielectric it reduces the problems associated with gate leakage and increases the drain current. Sentaurus TCAD tool is used to find out the performance of the devices.
••08 Sep 2014
TL;DR: In this paper, the oxide layer in between the gate electrode and the periphery of carbon nanotube was replaced with a high-K dielectric material to further increase the performance rate of the device.
Abstract: Carbon Nanotube Field Effect Transistor is preferred over Metal Oxide Semiconductor Field Effect Transistor since it is free from short channel effects. Top-gate carbon nanotube field-effect transistor has better performance rate than the back-gate carbon nanotube field-effect transistor . In this work, to further increase the performance rate of the device, the oxide layer in between the gate electrode and the periphery of carbon nanotube, is replaced with a high-K dielectric material. COMSOL Multiphysics and nanoHub are used as simulators. The device performance was analysed with the parameters like On current, potential across channel, electron density, transmission coefficient, etc.
••01 Jan 1999
TL;DR: In a single-phase edge-triggered circuit, in the case where there is no clock skew, the designer must ensure that for correct operation, each input-output path of a combinational subcircuit has a delay that is less than the clock period.
Abstract: Conventional synchronous circuit design is predicated on the assumption that each clock signal of the same phase arrives at each memory element at exactly the same time. In a sequential VLSI circuit, due to differences in interconnect delays on the clock distribution network, this simultaneity is difficult to achieve and clock signals do not arrive at all of the registers at the same time. This is referred to as a skew in the clock. In a single-phase edge-triggered circuit, in the case where there is no clock skew, the designer must ensure that for correct operation, each input-output path of a combinational subcircuit has a delay that is less than the clock period. In the presence of skew, however, the relation grows more complex and the task of designing the combinational subcircuits becomes more involved.
TL;DR: This paper presents a novel scheme to implement blind image watermarking based on the feature parameters extracted from a composite domain including the discrete wavelet transform (DWT), singular value decomposition (SVD), and discrete cosinetransform (DCT).
Abstract: Display Omitted A blind image watermarking scheme exploiting the DWT-SVD-DCT features is presented.The proposed PQIM reaches a trade-off between robustness and imperceptibility.Multiple watermarks can be embedded into a host image.The watermarks exhibit exceptional robustness against JPEG and JPEG2000 compression. This paper presents a novel scheme to implement blind image watermarking based on the feature parameters extracted from a composite domain including the discrete wavelet transform (DWT), singular value decomposition (SVD), and discrete cosine transform (DCT). Multiple bits can be embedded into a single image block by adjusting designated parameters via a progressive quantization index modulation technique. The quantization with respect to the feature parameters obtained in the DWT-SVD-DCT domain leads to efficient watermark extraction without referring to the original image. Experimental results show that the embedded watermarks exhibit exceptional robustness against image compression using JPEG and JPEG2000 coding standards.
TL;DR: In this article, the compared performance of various structures of Hetero-Dielectric (HD) triple-gate FinFETs with different gate oxides in terms of Double Heteron Gate Oxide (DHGO), Triple Heteronegated Gate Oxides (THGO) and Quadruple Heteroengated gate oxide (QHGO) was investigated.
Abstract: This paper is about the compared performance investigation of various structures of Hetero-Dielectric (HD) triple-gate FinFETs with different gate oxides in terms of Double Hetero Gate Oxide (DHGO), Triple Hetero Gate Oxide (THGO) and Quadruple Hetero Gate Oxide (QHGO) to produce lower leakage current, higher Ion/Ioff ratio, higher gm/gd and also lower Drain Induced Barrier Lowering (DIBL) than those of a conventional triple-gate FinFET. Among all of them, the best results are explored for the DHGO FinFET structure. In DHGO FinFET structure, a high-κ dielectric (κ = 22) is used on the top oxide to increase the gate control and a low-k dielectric (κ = 3.9) is used over silicon body owing to the compatibility of lattice constant of SiO2 and silicon. Mode-space drift-diffusion (DD_MS) model coupled with Schrodinger equation has been utilized in order to analyze the proposed and conventional structures in three dimensional (3D) simulation domain. Interestingly, by decreasing the thickness of the oxide layer and increasing the permittivity coefficient, the leakage current decreases, thus increasing the Ion/Ioff ratio. The DHGO FinFET structure is found to exhibit higher Ion/Ioff, lower DIBL and higher gm/gd ratio, thus proving performance superiority over the other conventional junctionless FinFET and also MOSFETs.
TL;DR: In this paper, a transparent lead alkali borate glass system of formula xZrO2−20PbO2·Na2B4O7 was prepared by melting quench method and doped by zirconia nanoparticles.
Abstract: Zirconium oxide (ZrO2) nanoparticles have been prepared and examined by XRD. The transparent lead alkali borate glass systems of formula xZrO2–20PbO2–(80 − x)·Na2B4O7 (0 ≤ x ≤ 24 mol%) are prepared by melting quench method and doped by zirconia nanoparticles. Deconvolution of its FTIR reveals to increase the N4 fraction boron atoms. This result reveals the Zr4+ which forms BO4 network units. The density and refractive index of chosen glass are increased due to add of ZrO2 nanoparticles. Both ultrasonic velocities (longitudinal vL and shear vT) increase with the ZrO2 content increase. The packing density, bulk modulus and Young’s modulus increase with increasing of ZrO2 nanoparticle content. The attenuation coefficients of the studied glasses have been measured at different energies (356, 662, 1173 and 1332 keV) using narrow beam transmission geometry. The obtained results indicated that, the values of the mass attenuation coefficient (µm), the effective atomic number (Zeff) and effective electron density (Nel) of the glass samples decreased with the increase in the ZrO2 concentration at the energies (662,1173and 1332 keV), while these parameters (µm, Zeff and Nel) increased with the increase in the ZrO2 concentration at 356 keV. The samples are irradiated 30 min by argon glow discharge plasma (GDP). The values of optical band gap decreased slowly with ZrO2 nanoparticles increased and after plasma irradiation.
TL;DR: The present study revealed that CNZr composite may work as an effective tool for removal of fluoride from contaminated water.
Abstract: The present study reports a novel approach for synthesis of Zr nanoparticles using aqueous extract of Aloe vera. Resulting nanoparticles were embedded into chitosan biopolymer and termed as CNZr composite. The composite was subjected to detailed adsorption studies for removal of fluoride from aqueous solution. The synthesized Zr nanoparticles showed UV-vis absorption peak at 420nm. TEM result showed the formation of polydispersed, nanoparticles ranging from 18nm to 42nm. SAED and XRD analysis suggested an fcc (face centered cubic) Zr crystallites. EDAX analysis suggested that Zr was an integral component of synthesized nanoparticles. FT-IR study indicated that functional group like NH, CO, CN and CC were involved in particle formation. The adsorption of fluoride on to CNZr composite worked well at pH 7.0, where ∼99% of fluoride was found to be adsorbed on adsorbent. Langmuir isotherm model best fitted the equilibrium data since it presented higher R(2) value than Freundlich model. In comparison to pseudo-first order kinetic model, the pseudo-second order model could explain adsorption kinetic behavior of F(-) onto CNZr composite satisfactorily with a good correlation coefficient. The present study revealed that CNZr composite may work as an effective tool for removal of fluoride from contaminated water.