This study introduces a new multilevel converter topology, which can synthesise all possible additive and subtractive combinations of input DC levels in the output voltage waveform with fewer power electronic switches. An appropriate modulation scheme has also been proposed for low switching frequency operation of the proposed topology. As compared with the classic multilevel topologies, the proposed topology results in reduction of the number of switches and conduction losses. The operation and performance of the proposed multilevel converter has been ascertained through simulations and verified experimentally for single-phase nine-level multilevel inverter. Moreover, a 15-level inverter with asymmetric source configuration has been also investigated for charge balance control using the proposed modulation scheme. The same has been verified experimentally for effective balanced power delivery.

Topology for multilevel inverters to attain maximum number of levels from given DC sources

In this paper, novel topologies for symmetric, asymmetric, and cascade switched-diode multilevel converter are proposed, which can produce many levels with minimum number of power electronic switches, gate driver circuits, power diodes, and dc voltage sources. The number of required power electronic switches against required voltage levels is a very important factor in designing of multilevel converter, because switches define the reliability, circuit size, cost, installation area, and control complexity. For asymmetric and cascade converter, new algorithms for determination of dc voltage sources values are presented. To produce maximum number of levels at the output voltage, the proposed cascade topology is optimized for different goals, such as the minimization of the number of power electronic switches, gate driver circuits, power diodes, dc voltage sources, and blocking voltage on switches. Comparison of the results of various multilevel converters will be investigated to reflect the merits of the presented topologies. The operations of the proposed multilevel converters have been analyzed with the experimental and simulation results for different topologies. Verification of the analytical results is done using MATLAB simulation.

Novel Topologies for Symmetric, Asymmetric, and Cascade Switched-Diode Multilevel Converter With Minimum Number of Power Electronic Components

In this paper, a multilevel voltage-source converter system is proposed for high-voltage, high-power applications such as back-to-back interconnection of power systems, large induction motor drives, and electrical traction drives. Multilevel voltage-source converters have a voltage unbalance problem in the DC capacitors. The problem may be solved by use of additional voltage regulators or separate DC sources. However, these solutions are found not to be practicable for most applications. The proposed converter system can solve the voltage unbalance problem of the conventional multilevel voltage-source converters, without using any additional voltage balance circuits or separate voltage sources. The mechanism of the voltage unbalance problem is analyzed theoretically in this paper. The voltage unbalance problem of multilevel converters in the DC capacitors has been solved by the proposed internal connections of the AC/DC and DC/AC converters. The validity of the new converter system is demonstrated by simulation and experiment. >

A multilevel voltage-source converter system with balanced DC voltages

This letter introduces a new series of multilevel (ML) converters based on the ML clamping concept. By applying this technique, a ML clamping unit (MCU) conveys additional levels for synthesizing the output waveforms of a diode-clamped ML dc-ac power converter. The basic building block of the ML clamping scheme is the ML clamping cell, which is composed of a pair of dc sources associated with one single-pole/triple-throw type of switch arrangement. The number of series-connected ML-clamping cells will set the number of levels of the synthesized waveform. By depending on the MCU arrangements, different converter configurations can be derived, namely, the common clamping and the modular types. Both approaches can be accomplished by employing classical three-level neutral-point-clamped (NPC) technology. Thus, the overall structure of the resultant converter is kept simple, wherein the number of parts count can be reduced, when compared with conventional NPC counterparts. In this letter, emphasis is given on the common clamping converter configuration. The attractiveness of the proposed ML concept is evidenced by conducting a comparative cost analysis. Experimental results are presented as a practicality proof of the proposed ML power converter.

Multilevel-Clamped Multilevel Converters (MLC $^2$ )

A multilevel Voltage Source Inverter (VSI) to maximize the number of levels in output waveform

This paper presents a diode-clamped multilevel converter topology with reduced number of clamping diodes. The novel topology uses a combination of multilevel converter cells with different number of levels. The proposed topology and its switching pattern are discussed based on a five-level converter, and it can be easily extended to N-level converter. Compared with the traditional topology, the proposed topology can significantly reduce the number of clamping diodes and the system cost of the multilevel converter. A detail comparison of the two topologies has been conducted. Simulation and experimental results show the validity of the topology.

V. Stefanovic

Papers

A diode-clamped multilevel converter with reduced number of clamping diodes