Vladimir Szekely

Bio: Vladimir Szekely is an academic researcher from Mentor Graphics. The author has contributed to research in topics: Transient (oscillation) & Integrated circuit. The author has an hindex of 17, co-authored 49 publications receiving 797 citations.

Thermal Measurement and Modeling of Multi-Die Packages

Abstract: Thermal measurement and modeling of multi-die packages with vertical (stacked) and lateral arrangement became a hot topic recently in different fields like RAM chip packaging or LEDs and LED assemblies. In our present study, we present results for a more complex structure: an opto-coupler device with four chips in a combined lateral and vertical arrangement. The paper gives an overview of measurement and modeling techniques and results for stacked and multichip module (MCM) structures. It describes actual measurement results along with our structure function-based methodology which helps validating the detailed model of the package being studied. For stack-die packages, we suggest an extension of the DELPHI model topology. Also, we show how one can derive junction-to-pin thermal resistances with a technique using structure functions.

Studies on the nonlinearity effects in dynamic compact model generation of packages

Abstract: In this paper, we present a series of measurement and simulation experiments that were accomplished to check the order of magnitude of the error caused by neglecting the temperature dependence of the dynamic compact models of packages. We present a methodology to create nonlinear, temperature dependent compact models. With this methodology we created temperature dependent compact models of packages based both on measured and simulated results and compared the behavior of the temperature dependent model to the temperature independent (linear) model. We have found that neglecting the nonlinearity is acceptable in a moderate temperature range. If the temperature excursion remains below 60-80/spl deg/C the error is expected to be less than 2-3%. For higher temperature rise the use of nonlinear compact models is recommended.

Increasing the accuracy of structure function based thermal material parameter measurements

Abstract: The Structure functions based evaluation of the thermal transient measurements is now a broadly accepted way for the characterization of the time dependent behavior of the heat flow path. The usual way of generating structure functions considers one main heat flow path. By using a large mathematical tool set it generates for this path the Rth-Cth map of the structure. This enables easy detection of partial thermal resistances in the heat flow path, with which we can determine the values of, e.g,. interface thermal resistances, local effective thermal conductivity values, etc. The accuracy that we can obtain with this material parameter measuring methodology is in the order of 20%. In this paper, we present a methodology that enhances the accuracy of the structure function based material parameter measuring methods. In this procedure, on one hand, we measure the thermal transients for the system to be characterized and on the other hand we measure the "parasitic" heat flow path, that influences our measurement. The material parameters are calculated by appropriately modifying the measured results with the data of the parasitic heat flow path. In this paper, we present this methodology with mathematical details, and prove it with measured results.

Multi-domain simulation and measurement of power LED-s and power LED assemblies

Abstract: Besides their electrical properties the optical parameters of LEDs also depend on junction temperature. For this reason thermal characterization and thermal management plays important role in case of power LEDs, necessitating tools both for physical measurements and simulation. The focus of this paper is a combined electrical, thermal and optical characterization of such devices. In terms of simulation a novel approach of board-level electro-thermal simulation is presented whereas in terms of measurement, a combined thermal and radiometric characterization method is discussed

Tracing the thermal behavior of ICs

Abstract: Today's increased power and packaging densities demand designers' attention to the effects of heat on ICs. The authors review thermal and electrothermal simulation and measurement methods, thermal package characterization, and the concept and techniques of design for thermal testability.

Temperature-aware microarchitecture: Modeling and implementation

Abstract: With cooling costs rising exponentially, designing cooling solutions for worst-case power dissipation is prohibitively expensive. Chips that can autonomously modify their execution and power-dissipation characteristics permit the use of lower-cost cooling solutions while still guaranteeing safe temperature regulation. Evaluating techniques for this dynamic thermal management (DTM), however, requires a thermal model that is practical for architectural studies.This paper describes HotSpot, an accurate yet fast and practical model based on an equivalent circuit of thermal resistances and capacitances that correspond to microarchitecture blocks and essential aspects of the thermal package. Validation was performed using finite-element simulation. The paper also introduces several effective methods for DTM: "temperature-tracking" frequency scaling, "migrating computation" to spare hardware units, and a "hybrid" policy that combines fetch gating with dynamic voltage scaling. The latter two achieve their performance advantage by exploiting instruction-level parallelism, showing the importance of microarchitecture research in helping control the growth of cooling costs.Modeling temperature at the microarchitecture level also shows that power metrics are poor predictors of temperature, that sensor imprecision has a substantial impact on the performance of DTM, and that the inclusion of lateral resistances for thermal diffusion is important for accuracy.

Thermal Modeling, Analysis, and Management in VLSI Circuits: Principles and Methods

Abstract: The growing packing density and power consumption of very large scale integration (VLSI) circuits have made thermal effects one of the most important concerns of VLSI designers The increasing variability of key process parameters in nanometer CMOS technologies has resulted in larger impact of the substrate and metal line temperatures on the reliability and performance of the devices and interconnections Recent data shows that more than 50% of all integrated circuit failures are related to thermal issues This paper presents a brief discussion of key sources of power dissipation and their temperature relation in CMOS VLSI circuits, and techniques for full-chip temperature calculation with special attention to its implications on the design of high-performance, low-power VLSI circuits The paper is concluded with an overview of techniques to improve the full-chip thermal integrity by means of off-chip versus on-chip and static versus adaptive methods

Physics-of-Failure, Condition Monitoring, and Prognostics of Insulated Gate Bipolar Transistor Modules: A Review

Abstract: Recent growth of the insulated gate bipolar transistor (IGBT) module market has been driven largely by the increasing demand for an efficient way to control and distribute power in the field of renewable energy, hybrid/electric vehicles, and industrial equipment. For safety-critical and mission-critical applications, the reliability of IGBT modules is still a concern. Understanding the physics-of-failure of IGBT modules has been critical to the development of effective condition monitoring (CM) techniques as well as reliable prognostic methods. This review paper attempts to summarize past developments and recent advances in the area of CM and prognostics for IGBT modules. The improvement in material, fabrication, and structure is described. The CM techniques and prognostic methods proposed in the literature are presented. This paper concludes with recommendations for future research topics in the CM and prognostics areas.

Three-Dimensional Integrated Circuit Design

Abstract: With vastly increased complexity and functionality in the "nanometer era" (i.e. hundreds of millions of transistors on one chip), increasing the performance of integrated circuits has become a challenging task. This is due primarily to the inevitable increase in the distance among circuit elements and interconnect design solutions have become the greatest determining factor in overall performance. Three-dimensional (3D) integrated circuits (ICs), which contain multiple layers of active devices, have the potential to enhance dramatically chip performance and functionality, while reducing the distance among devices on a chip. They promise solutions to the current "interconnect bottleneck" challenges faced by IC designers. They also may facilitate the integration of heterogeneous materials, devices, and signals. However, before these advantages can be realized, key technology challenges of 3D ICs must be addressed. This is the first book on 3-D integrated circuit design, covering all of the technological and design aspects of this emerging design paradigm, while proposing effective solutions to specific challenging problems concerning the design of three-dimensional integrated circuits. A handy, comprehensive reference or a practical design guide, this book provides a sound foundation for the design of three-dimensional integrated circuits. * Demonstrates how to overcome "Interconnect Bottleneck" with 3D Integrated Circuit Design...leading edge design techniques offer solutions to problems (performance/power consumption/price) faced by all circuit designers. * The FIRST book on 3D Integrated Circuit Design...provides up-to-date information that is otherwise difficult to find; * Focuses on design issues key to the product development cyle...good design plays a major role in exploiting the implementation flexibilities offered in the third dimension; * Provides broad coverage of 3D IC Design, including Interconnect Prediction Models, Thermal Management Techniques, and Timing Optimization...offers practical view of designing 3D circuits.

Identification of RC networks by deconvolution: chances and limits

Abstract: This paper deals with the identification of RC networks from their time- or frequency-domain responses. A new method is presented based on a recent approach of the network description where all response functions are calculated by convolution integrals. The identification is carried out by deconvolution (NID method). This paper discusses the practical details of the method. Special attention is paid to the identification and modeling of distributed RC networks, like the problems of conductive heat-flow. A number of examples make it easy to understand the operation and the capabilities of the NID method. Comparative considerations are given concerning the accuracy and expenses of the NID and the popular AWE (momentum-matching) methods.