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W.R. Curtice

Bio: W.R. Curtice is an academic researcher from Princeton University. The author has contributed to research in topics: Electronic circuit & Amplifier. The author has an hindex of 3, co-authored 3 publications receiving 849 citations.

Papers
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Journal ArticleDOI
TL;DR: In this paper, a MESFET model is presented that is suitable for use in conventional, time-domain circuit simulation programs, and the parameters of the model are evaluated either from experimental data or from more detailed device analysis.
Abstract: A MESFET model is presented that is suitable for use in conventional, time-domain circuit simulation programs. The parameters of the model are evaluated either from experimental data or from more detailed device analysis. The model is shown to be more complete than earlier models, which neglect transit-time and other effects. An integrated circuit (IC) design example is discussed.

461 citations

Journal ArticleDOI
TL;DR: In this article, a nonlinear equivalent circuit model for the GaAs FET has been developed based upon the small-signal device model and separate current measurements, including drain-gate avalanche current data.
Abstract: A nonlinear equivalent circuit model for the GaAs FET has been developed based upon the small-signal device model and separate current measurements, including drain-gate avalanche current data. The harmonic-balance technique is used to develop the FET RF load-pull characteristics in an amplifier configuration under large-signal operation. Computed and experimental load-pull results show good agreement.

402 citations

Proceedings ArticleDOI
04 Jun 1985
TL;DR: A nonlinear equivalent circuit model for the GaAs FET has been developed based upon the small-signal device model and separate current measurements, including drain-gate avalanche current data.
Abstract: A nonlinear equivalent circuit model for the GaAs FET has been developed based upon the small-signal device model and separate current measurements, including drain-gate avalanche current data The harmonic balance technique is used to develop the FET rf load-pull characteristics in an amplifier configuration under large signal operation Computed and experimental load-pull results show good agreement

18 citations


Cited by
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Journal ArticleDOI
Raymond S. Pengelly1, Simon Wood1, J.W. Milligan1, Scott T. Sheppard1, W. Pribble1 
TL;DR: Examples of broadband amplifiers, as well as several of the main areas of high-efficiency amplifier design-notably Class-D, Class-E, class-F, and Class-J approaches, Doherty PAs, envelope-tracking techniques, and Chireix outphasing are described.
Abstract: Gallium-nitride power transistor (GaN HEMT) and integrated circuit technologies have matured dramatically over the last few years, and many hundreds of thousands of devices have been manufactured and fielded in applications ranging from pulsed radars and counter-IED jammers to CATV modules and fourth-generation infrastructure base-stations. GaN HEMT devices, exhibiting high power densities coupled with high breakdown voltages, have opened up the possibilities for highly efficient power amplifiers (PAs) exploiting the principles of waveform engineered designs. This paper summarizes the unique advantages of GaN HEMTs compared to other power transistor technologies, with examples of where such features have been exploited. Since RF power densities of GaN HEMTs are many times higher than other technologies, much attention has also been given to thermal management-examples of both commercial “off-the-shelf” packaging as well as custom heat-sinks are described. The very desirable feature of having accurate large-signal models for both discrete transistors and monolithic microwave integrated circuit foundry are emphasized with a number of circuit design examples. GaN HEMT technology has been a major enabler for both very broadband high-PAs and very high-efficiency designs. This paper describes examples of broadband amplifiers, as well as several of the main areas of high-efficiency amplifier design-notably Class-D, Class-E, Class-F, and Class-J approaches, Doherty PAs, envelope-tracking techniques, and Chireix outphasing.

840 citations

Journal ArticleDOI
TL;DR: In this article, a large-signal model for HEMTs and MESFETs, capable of modeling the currentvoltage characteristic and its derivatives, including the characteristic transconductance peak, gate-source and gate-drain capacitances, is proposed.
Abstract: A large-signal model for HEMTs and MESFETs, capable of modeling the current-voltage characteristic and its derivatives, including the characteristic transconductance peak, gate-source and gate-drain capacitances, is proposed. Model parameter extraction is straightforward and is demonstrated for different submicron gate-length HEMT devices including different delta -doped pseudomorphic HEMTs on GaAs and lattice matched to InP, and a commercially available MESFET. Measured and modeled DC and S-parameters are compared and found to coincide well. >

519 citations

Journal ArticleDOI
TL;DR: In this article, a nonlinear equivalent circuit model for the GaAs FET has been developed based upon the small-signal device model and separate current measurements, including drain-gate avalanche current data.
Abstract: A nonlinear equivalent circuit model for the GaAs FET has been developed based upon the small-signal device model and separate current measurements, including drain-gate avalanche current data. The harmonic-balance technique is used to develop the FET RF load-pull characteristics in an amplifier configuration under large-signal operation. Computed and experimental load-pull results show good agreement.

402 citations

Journal ArticleDOI
TL;DR: The ability to simulate temperature, dispersion, and soft-breakdown effects as well as a new /spl alpha/ dependence was added to the Chalmers nonlinear model for high electron mobility transistor (HEMT) and metal semiconductor field effect transistor (MESFET's) in this paper.
Abstract: The ability to simulate temperature, dispersion, and soft-breakdown effects as well as a new /spl alpha/ dependence was added to the Chalmers nonlinear model for high electron mobility transistor (HEMT's) and metal semiconductor field-effect transistor (MESFET's). DC, pulsed dc, low frequency (10 Hz-10 MHz), RF, and small signal S-parameter measurements (1-18 GHz) have been made on a large number of commercial HEMT and MESFET devices from different manufacturers in the temperature range 17-400 K in order to evaluate the validity of the model extensions.

284 citations

Journal ArticleDOI
TL;DR: In this article, a simple and efficient method of GaAs FET amplifier analysis is presented, where the FET is represented by its circuit-type nonlinear dynamic model taking into account the device's main nonlinear effects including gate-drain voltage breakdown.
Abstract: A simple and efficient method of GaAs FET amplifier analysis is presented. The FET is represented by its circuit-type nonlinear dynamic model taking into account the device's main nonlinear effects including gate-drain voltage breakdown. An identification procedure for extraction of the model parameters is described in detail and examples are given. The calculation of the amplifier response to a single-input harmonic signal is performed using the piecewise harmonic balance technique. As this technique is rather time-consuming in its original form, the optimization routine used to solve the network equations was replaced by the Newton-Raphson algorithm. Characteristics calculated with the use of the proposed method are compared with experimental data taken for a microwave amplifier using a 2SK273 GaAs FET unit. Good agreement at 9.5 GHz over wide ranges of bias voltage and input power levels are observed.

246 citations