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Weiguo Lu

Bio: Weiguo Lu is an academic researcher from Chongqing University. The author has contributed to research in topics: Buck converter & Inductor. The author has an hindex of 8, co-authored 27 publications receiving 190 citations.

Papers
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Journal ArticleDOI
TL;DR: A comprehensive review and comparison of CM schemes for different types of dc-link applications with emphasis on the application objectives, implementation methods, and monitoring accuracy when being used is provided.
Abstract: Capacitors are widely used in dc links of power electronic converters to balance power, suppress voltage ripple, and store short-term energy. Condition monitoring (CM) of dc-link capacitors has great significance in enhancing the reliability of power converter systems. Over the past few years, many efforts have been made to realize CM of dc-link capacitors. This article gives an overview and a comprehensive comparative evaluation of them with emphasis on the application objectives, implementation methods, and monitoring accuracy when being used. First, the design procedure for the CM of capacitors is introduced. Second, the main capacitor parameters estimation principles are summarized. According to these principles, various possible CM methods are derived in a step-by-step manner. On this basis, a comprehensive review and comparison of CM schemes for different types of dc-link applications are provided. Finally, application recommendations and future research trends are presented.

98 citations

Journal ArticleDOI
Quanming Luo1, Shubo Zhi1, Can Zou1, Weiguo Lu1, Luowei Zhou1 
TL;DR: In this article, a multichannel constant current LED driver with dynamic high-frequency sinusoidal voltage regulation is proposed, which is composed of one resonant inverter and several LCL-T resonant rectifiers.
Abstract: In order to obtain sufficient luminance and achieve high reliability, light-emitting diodes (LEDs) are usually arranged in parallel strings in many high-power applications. Since current imbalance should be avoided among the parallel LED strings, a multichannel constant current LED driver with dynamic high-frequency sinusoidal voltage regulation is proposed in this paper. The proposed driver is composed of one resonant inverter and several LCL-T resonant rectifiers. The number of the rectifiers equals to that of the LED strings. The rectifier whose output current is sensed and closed-loop controlled is called master rectifier and all the others slave rectifiers. The resonant inverter is used to convert dc voltage into high-frequency sinusoidal bus voltage and the LCL-T resonant rectifiers are included to drive LED strings with constant current. The amplitude of the high-frequency sinusoidal bus voltage is dynamically regulated to ensure the output current of the master resonant rectifier to be constant by a closed-loop controller. Since the output current of the slave rectifier is linear with the amplitude of the bus voltage as the master rectifier, there are not any auxiliary circuits included in the slave rectifier while the output current balancing is achieved. Finally, a 200-W prototype with one master and fifteen slave rectifiers is built to verify the performance of the proposed driver.

43 citations

Journal ArticleDOI
TL;DR: An online monitoring scheme is proposed for buck converters, aiming to estimate the ESR and capacitor parameters of AEC at the output side using large-signal load transient trajectories and has a relatively low sampling frequency.
Abstract: Aluminum electrolytic capacitor (AEC) is one of the weakest components in power electronic converters. As the degradation of AEC happens, its equivalent series resistance (ESR) increases and the capacitance ( $C)$ decreases. Therefore, the online monitoring of ESR and $C$ to predict AEC’s life has great significance for ensuring safe and reliable operation of converters. In this article, an online monitoring scheme is proposed for buck converters, aiming to estimate the ESR and $C$ of AEC at the output side. The proposed scheme utilizes large-signal load transient trajectories to estimate the AEC parameters and has a relatively low sampling frequency. By analyzing the relationship between the transient trajectory and capacitor parameters, the ESR is directly calculated using the voltage and current step values at the initial instant of the transient. Furthermore, $C$ is calculated utilizing a calculation model derived from the output-voltage load transient trajectory. Corresponding simulation analysis and an online monitoring system implementation are provided. Furthermore, a 48–12-V buck converter with a digital proportional-integral (PI) controller and an analog $V^{2}$ controller is built to verify the proposed online estimation method. The experimental results of the estimated ESR and $C$ are consistent with the results measured by an LCR meter, and the estimation error is less than 10%.

34 citations

Journal ArticleDOI
TL;DR: A hybrid dynamic compensation (HDC) scheme, which incorporates a combination of zero-perturbation dynamic Compensation (ZPDC) and ripple compensation, which can suppress the fast-scale instabilities and also ensure average inductor current tracks a desired sinusoidal reference which is not possible with the ZPDC scheme alone.
Abstract: Traditional slope compensation (SC) method is an effective way to control fast-scale instabilities present in peak current mode (PCM) controlled boost PFC converters. However, with the SC method, envelope of inductor current deviates from a desired sinusoid especially near the zero crossings, which causes the system power factor to reduce to values lower than what is possible without compensation. To tackle this problem we propose a hybrid dynamic compensation (HDC) scheme, which incorporates a combination of zero-perturbation dynamic compensation (ZPDC) and ripple compensation. The proposed HDC scheme can suppress the fast-scale instabilities and also ensure average inductor current tracks a desired sinusoidal reference which is not possible with the ZPDC scheme alone where only the peak inductor current can track a desired sinusoidal signal. Furthermore, with the proposed HDC scheme the total harmonic distortion (THD) and power factor (PF) are improved in comparison to the SC and ZPDC schemes as well as to the case without compensation. Moreover, operating range of a control parameter is determined analytically subject to some assumptions. Extensive simulation and experimental results are provided to validate the theoretical analysis and the feasibility of the proposed HDC scheme.

33 citations

Journal ArticleDOI
Weiguo Lu1, Xuemei Lu1, Jinxin Han1, Zhaoyang Zhao1, Xiong Du1 
TL;DR: In this paper, an online ESR estimation method of aluminum electrolytic capacitor (AEC) was proposed by using the wavelet transform (WT) based time-frequency analysis, and the relationship between ESR and the jump amount of output voltage at turn- off moments was analyzed first, and then the ESR calculation model was derived using WT with the Wavelet basis of the first derivative of Gaussian function.
Abstract: Aluminum electrolytic capacitor (AEC) is one of the most age-affected components in ac–dc conversion, and its equivalent series resistance ( ESR ) is an important index for reflecting the healthy condition of AEC. In AEC-used boost power factor correction (PFC) converters, ESR of AEC causes a small jump in the switching ripple of output voltage at switching moments, especially at turn- off moments. This small jump is hardly observed at line-frequency scale, either using time-domain analysis or frequency-domain analysis. However using time–frequency analysis this jump is very prominent due to its singularity. In this article, an online ESR estimation method of AEC is proposed by using the wavelet transform (WT) based time–frequency analysis. The relationship between ESR and the jump amount of output voltage at turn- off moments is analyzed first, and then the ESR calculation model is derived using WT with the wavelet basis of the first derivative of Gaussian function. An appropriate sampling interval for the output voltage and the inductor current is determined. Besides, the online ESR estimation scheme is implemented including the hardware and software designs. Furthermore, a prototype of boost PFC converter with 220 V ac input and 360 V dc output is built, where an average current mode control chip UC3854 is used. Four factors are discussed for estimation accuracy in the experiment, and the estimated results are consistent with the results measured by LCR meter with a relative error less than 10%.

26 citations


Cited by
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Journal ArticleDOI
TL;DR: A comprehensive review and comparison of CM schemes for different types of dc-link applications with emphasis on the application objectives, implementation methods, and monitoring accuracy when being used is provided.
Abstract: Capacitors are widely used in dc links of power electronic converters to balance power, suppress voltage ripple, and store short-term energy. Condition monitoring (CM) of dc-link capacitors has great significance in enhancing the reliability of power converter systems. Over the past few years, many efforts have been made to realize CM of dc-link capacitors. This article gives an overview and a comprehensive comparative evaluation of them with emphasis on the application objectives, implementation methods, and monitoring accuracy when being used. First, the design procedure for the CM of capacitors is introduced. Second, the main capacitor parameters estimation principles are summarized. According to these principles, various possible CM methods are derived in a step-by-step manner. On this basis, a comprehensive review and comparison of CM schemes for different types of dc-link applications are provided. Finally, application recommendations and future research trends are presented.

98 citations

Journal ArticleDOI
TL;DR: A single-inductor dual-output (SIDO) buck-boost power factor correction (PFC) converter operating in critical conduction mode and benefits from significant overall cost saving, small size, and light weight.
Abstract: A single-inductor dual-output (SIDO) buck–boost power factor correction (PFC) converter operating in critical conduction mode is proposed in this paper. By multiplexing a single inductor, each output of the SIDO buck–boost converter can be regulated independently. Compared with a conventional two-stage multiple-output converter, the SIDO buck–boost PFC converter benefits from significant overall cost saving, small size, and light weight. Moreover, the efficiency of the SIDO buck–boost PFC converter can be improved due to single-stage power conversion. The control strategy and characteristics of the proposed converter are analyzed. The efficiency, power factor, total harmonic distortion, and output accuracy are verified using the experimental results.

84 citations

Journal ArticleDOI
TL;DR: In this article, the authors proposed a current-source-output LED driver based on LCLC resonant circuit to provide a constant output current regardless of variations in LED parameters, where the number of additional capacitors is scalable with number of LED strings for current balancing.
Abstract: Passive or active current balancing circuits are usually used to mitigate current imbalance in driving multiple light-emitting-diode (LED) strings. Passive current balancing schemes adopting capacitors with high reliability, small size and low cost are very popular in many applications. However, the high reactive power of the capacitive balancing scheme with variable frequency control will bring high power stress on the VA rating of the main switches which drive this passive current balancing circuit and decrease the overall efficiency. Fixed frequency control does not permit zero-voltage switching (ZVS) under load variations. Hence, this paper proposes a current-source-output LED driver based on LCLC resonant circuit to provide a constant output current regardless of variations in LED parameters. In the LCLC circuit, the number of additional capacitors is scalable with the number of LED strings for current balancing. Moreover, the input impedance of the improved LCLC circuit is designed to be resistive at the operating frequency to minimize reactive power. The conventional duty cycle control can easily incorporate ZVS. The analysis, implementation and verification are detailed in this paper.

74 citations

Journal ArticleDOI
TL;DR: In this paper, a 1 MHz half-bridge resonant dc/dc converter based on GaN FETs and planar magnetics is proposed, which improves the system efficiency and power density.
Abstract: A 1 MHz half-bridge resonant dc/dc converter based on GaN FETs and planar magnetics is proposed in this paper, which improves the system efficiency and power density. The resonant network can achieve satisfactory soft-switching characteristics based on a small impedance angle, which greatly reduces the losses of switches and diodes. The losses characteristics during the turn-on and turn-off transitions are analyzed in detail. The calculation results show that the GaN FETs with low output capacitance and on resistance can achieve fast switching speed and low losses in high-frequency conditions. To reduce the profile and increase the power density of the system, planar magnetics are used in this paper. The response surface methodology (RSM) and modular layer model (MLM) are adopted to help design the planar inductor and transformer, respectively. Both of the methods offer clearer and more effective ways to design the planar magnetics. A 25-W prototype is built to verify the feasibility of the proposed high-frequency converter.

53 citations

Journal ArticleDOI
TL;DR: It is shown that a cascaded PI control-loop approach cannot guarantee the system stability throughout the operating conditions and in-depth experimental results are presented to prove the stability issue using a modular hybrid battery energy storage system prototype under various operating conditions.
Abstract: There is an emerging application, which uses a mixture of batteries within an energy storage system. These hybrid battery solutions may contain different battery types. A dc-side cascaded boost converters along with a module-based distributed power sharing strategy has been proposed to cope with variations in battery parameters such as, state-of-charge (SOC) and/or capacity. This power sharing strategy distributes the total power among the different battery modules according to these battery parameters. Each module controller consists of an outer voltage-loop with an inner current-loop where the desired control reference for each control-loop needs to be dynamically varied according to battery parameters to undertake this sharing. As a result, the designed control bandwidth (BW) or stability margin of each module control-loop may vary in a wide range, which can cause a stability problem within the cascaded converter. This paper reports such a unique issue and thoroughly investigates the stability of the modular converter under the distributed sharing scheme. The paper shows that a cascaded PI control-loop approach cannot guarantee the system stability throughout the operating conditions. A detailed analysis of the stability issue and the limitations of the conventional approach are highlighted. Finally in-depth experimental results are presented to prove the stability issue using a modular hybrid battery energy storage system prototype under various operating conditions.

52 citations