抗原变异可使得多种致病微生物易于逃避宿主免疫应答。表达在感染红细胞表面的恶性疟原虫红细胞表面蛋白1（PfPMP1）与感染红细胞、内皮细胞、树突状细胞以及胎盘的单个或多个受体作用，在黏附及免疫逃避中起关键的作用。每个单倍体基因组var基因家族编码约60种成员，通过启动转录不同的var基因变异体为抗原变异提供了分子基础。

疟原虫var基因转换速率变化导致抗原变异[英]／Paul H, Robert P, Christodoulou Z, et al//Proc Natl Acad Sci U S A

Recent years have witnessed many breakthroughs in research on graphene (the first two-dimensional atomic crystal) as well as a significant advance in the mass production of this material. This one-atom-thick fabric of carbon uniquely combines extreme mechanical strength, exceptionally high electronic and thermal conductivities, impermeability to gases, as well as many other supreme properties, all of which make it highly attractive for numerous applications. Here we review recent progress in graphene research and in the development of production methods, and critically analyse the feasibility of various graphene applications.

/pdf/a-roadmap-for-graphene-1nstzmbk5x.pdf

A roadmap for graphene

Worldwide commercial interest in carbon nanotubes (CNTs) is reflected in a production capacity that presently exceeds several thousand tons per year. Currently, bulk CNT powders are incorporated in diverse commercial products ranging from rechargeable batteries, automotive parts, and sporting goods to boat hulls and water filters. Advances in CNT synthesis, purification, and chemical modification are enabling integration of CNTs in thin-film electronics and large-area coatings. Although not yet providing compelling mechanical strength or electrical or thermal conductivities for many applications, CNT yarns and sheets already have promising performance for applications including supercapacitors, actuators, and lightweight electromagnetic shields.

/pdf/carbon-nanotubes-present-and-future-commercial-applications-1nhq3xy4hh.pdf

Carbon Nanotubes: Present and Future Commercial Applications

Approaches, Derivatives and Applications Vasilios Georgakilas,† Michal Otyepka,‡ Athanasios B. Bourlinos,‡ Vimlesh Chandra, Namdong Kim, K. Christian Kemp, Pavel Hobza,‡,§,⊥ Radek Zboril,*,‡ and Kwang S. Kim* †Institute of Materials Science, NCSR “Demokritos”, Ag. Paraskevi Attikis, 15310 Athens, Greece ‡Regional Centre of Advanced Technologies and Materials, Department of Physical Chemistry, Faculty of Science, Palacky University Olomouc, 17. listopadu 12, 771 46 Olomouc, Czech Republic Center for Superfunctional Materials, Department of Chemistry, Pohang University of Science and Technology, San 31, Hyojadong, Namgu, Pohang 790-784, Korea Institute of Organic Chemistry and Biochemistry, Academy of Sciences of the Czech Republic, v.v.i., Flemingovo naḿ. 2, 166 10 Prague 6, Czech Republic

Functionalization of Graphene: Covalent and Non-Covalent Approaches, Derivatives and Applications

Graphene is very popular because of its many fascinating properties, but its lack of an electronic bandgap has stimulated the search for 2D materials with semiconducting character. Transition metal dichalcogenides (TMDCs), which are semiconductors of the type MX2, where M is a transition metal atom (such as Mo or W) and X is a chalcogen atom (such as S, Se or Te), provide a promising alternative. Because of its robustness, MoS2 is the most studied material in this family. TMDCs exhibit a unique combination of atomic-scale thickness, direct bandgap, strong spin–orbit coupling and favourable electronic and mechanical properties, which make them interesting for fundamental studies and for applications in high-end electronics, spintronics, optoelectronics, energy harvesting, flexible electronics, DNA sequencing and personalized medicine. In this Review, the methods used to synthesize TMDCs are examined and their properties are discussed, with particular attention to their charge density wave, superconductive and topological phases. The use of TMCDs in nanoelectronic devices is also explored, along with strategies to improve charge carrier mobility, high frequency operation and the use of strain engineering to tailor their properties. Two-dimensional transition metal dichalcogenides (TMDCs) exhibit attractive electronic and mechanical properties. In this Review, the charge density wave, superconductive and topological phases of TMCDs are discussed, along with their synthesis and applications in devices with enhanced mobility and with the use of strain engineering to improve their properties.

2D transition metal dichalcogenides

Although carbon nanotube (CNT) transistors have been promoted for years as a replacement for silicon technology, there is limited theoretical work and no experimental reports on how nanotubes will perform at sub-10 nm channel lengths. In this manuscript, we demonstrate the first sub-10 nm CNT transistor, which is shown to outperform the best competing silicon devices with more than four times the diameter-normalized current density (2.41 mA/μm) at a low operating voltage of 0.5 V. The nanotube transistor exhibits an impressively small inverse subthreshold slope of 94 mV/decade-nearly half of the value expected from a previous theoretical study. Numerical simulations show the critical role of the metal-CNT contacts in determining the performance of sub-10 nm channel length transistors, signifying the need for more accurate theoretical modeling of transport between the metal and nanotube. The superior low-voltage performance of the sub-10 nm CNT transistor proves the viability of nanotubes for consideration in future aggressively scaled transistor technologies.

Sub-10 nm carbon nanotube transistor.

SRAM cell stability will be a primary concern for future technologies due to variability and decreasing power supply voltages. 6T-SRAM can be optimized for stability by choosing the cell layout, device threshold voltages, and the /spl beta/ ratio. 8T-SRAM, however, provides a much greater enhancement in stability by eliminating cell disturbs during a read access, thus facilitating continued technology scaling. We demonstrate the smallest 6T (0.124/spl mu/m/sup 2/ half-cell) and full 8T (0.1998/spl mu/m/sup 2/) cells to date.

https://www.bioee.ee.columbia.edu/courses/upload/Bibliography/chang_vlsitech_2005.pdf?origin=publication_detail

Stable SRAM cell design for the 32 nm node and beyond

Recent changes in CMOS device structures and materials motivated by impending atomistic and quantum-mechanical limitations have profoundly influenced the nature of delay and power variability. Variations in process, temperature, power supply, wear-out, and use history continue to strongly influence delay. The manner in which tolerance is specified and accommodated in high-performance design changes dramatically as CMOS technologies scale beyond a 90-nm minimum lithographic linewidth. In this paper, predominant contributors to variability in new CMOS devices are surveyed, and preferred approaches to mitigate their sources of variability are proposed. Process-, device-, and circuit-level responses to systematic and random components of tolerance are considered. Exploratory, novel structures emerging as evolutionary CMOS replacements are likely to change the nature of variability in the coming generations.

High-performance CMOS variability in the 65-nm regime and beyond

To a large extent, scaling was not seriously challenged in the past. However, a closer look reveals that early signs of scaling limits were seen in high-performance devices in recent technology nodes. To obtain the projected performance gain of 30% per generation, device designers have been forced to relax the device subthreshold leakage continuously from one to several nA/µm for the 250-nm node to hundreds of nA/µm for the 65-nm node. Consequently, passive power density is now a significant portion of the power budget of a high-speed microprocessor. In this paper we discuss device and material options to improve device performance when conventional scaling is power-constrained. These options can be separated into three categories: improved short-channel behavior, improved current drive, and improved switching behavior. In the first category fall advanced dielectrics and multi-gate devices. The second category comprises mobility-enhancing measures through stress and substrate material alternatives. The third category focuses mainly on scaling of SOI body thickness to reduce capacitance. We do not provide details of the fabrication of these different device options or the manufacturing challenges that must be met. Rather, we discuss the fundamental scaling issues related to the various device options. We conclude with a brief discussion of the ultimate FET close to the fundamental silicon device limit.

Silicon CMOS devices beyond scaling

Arrays of semiconducting single-walled carbon nanotubes with a nanotube density of more than 500 tubes per micrometre can be assembled using the Langmuir–Schaefer method and used to make transistors with significant device performance.

Wilfried Haensch

Papers

Sub-10 nm carbon nanotube transistor.

Stable SRAM cell design for the 32 nm node and beyond

High-performance CMOS variability in the 65-nm regime and beyond

Silicon CMOS devices beyond scaling

Arrays of single-walled carbon nanotubes with full surface coverage for high-performance electronics